UPD70F3765GF-GAT-AX Renesas Electronics America, UPD70F3765GF-GAT-AX Datasheet - Page 1378

• Manufacturer Part Number: UPD70F3765GF-GAT-AX
• Description: MCU 32BIT V850ES/JX3-H 128-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Jx3-Hr

Specifications of UPD70F3765GF-GAT-AX

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 48MHz
• Connectivity: CSI, EBI/EMI, I²C, UART/USART, USB
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 96
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 40K x 8
• Voltage - Supply (vcc/vdd): 2.85 V ~ 3.6 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

V850ES/JG3-H, V850ES/JH3-H
31.4.6 Pin connection
programmer. Also, incorporate a function on-board to switch from the normal operation mode to the flash memory
programming mode.
as that immediately after reset. Therefore, pin handling is required when the external device does not acknowledge the
status immediately after a reset.
R01UH0042EJ0400 Rev.4.00
Sep 30, 2010
When performing on-board writing, mount a connector on the target system to connect to the dedicated flash
In the flash memory programming mode, all the pins not used for flash memory programming become the same status
(1) FLMD0 pin
(2) FLMD1 pin
Caution If the V
In the normal operation mode, input a voltage of V
mode, supply a write voltage of V
Because the FLMD0 pin serves as a write protection pin in the self programming mode, a voltage of V
be supplied to the FLMD0 pin via port control, etc., before writing to the flash memory. For details, see 31.5.5 (1)
FLMD0 pin.
When 0 V is input to the FLMD0 pin, the FLMD1 pin does not function. When V
the flash memory programming mode is entered, so 0 V must be input to the FLMD1 pin. The following shows an
example of the connection of the FLMD1 pin.
immediately after reset, isolate this signal.
DD
signal is input to the FLMD1 pin from another device during on-board writing and
V850ES/JG3-H,
V850ES/JH3-H
V850ES/JG3-H,
V850ES/JH3-H
FLMD0
Figure 31-11. FLMD0 Pin Connection Example
Figure 31-12. FLMD1 Pin Connection Example
FLMD1
DD
level to the FLMD0 pin.
Dedicated flash programmer connection pin
Pull-down resistor (R
SS
Pull-down resistor (R
level to the FLMD0 pin. In the flash memory programming
Other device
FLMD0
FLMD1
)
)
CHAPTER 31 FLASH MEMORY
DD
is supplied to the FLMD0 pin,
Page 1378 of 1509
DD
level must