UPD70F3765GF-GAT-AX Renesas Electronics America, UPD70F3765GF-GAT-AX Datasheet - Page 1507

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UPD70F3765GF-GAT-AX

Manufacturer Part Number
UPD70F3765GF-GAT-AX
Description
MCU 32BIT V850ES/JX3-H 128-LQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Jx3-Hr
Datasheet

Specifications of UPD70F3765GF-GAT-AX

Core Processor
RISC
Core Size
32-Bit
Speed
48MHz
Connectivity
CSI, EBI/EMI, I²C, UART/USART, USB
Peripherals
DMA, LVD, PWM, WDT
Number Of I /o
96
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
40K x 8
Voltage - Supply (vcc/vdd)
2.85 V ~ 3.6 V
Data Converters
A/D 12x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UPD70F3765GF-GAT-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
V850ES/JG3-H, V850ES/JH3-H
E.2 Revision History of Preceding Editions
R01UH0042EJ0400 Rev.4.00
Sep 30, 2010
3rd
Edition
Here is the revision history of the preceding editions. Chapter indicates the chapter of each edition.
communication serial interface
Addition of Note to 5.5.1(1) Data wait control register 0 (DWC0)
Addition of Note to 5.5.4(1) Address wait control register (AWC)
Addition of Note to 5.6(1) Bus cycle control register (BCC)
Modification of CHAPTER 20 CAN CONTROLLER
Addition of Caution to 21.1 Overview
Modification of Figure 21-3. Example of USB Function Controller Connection
Modification of 21.4 (2) Stopping the USB clock
Modification of 21.6.1 (2) USB function control register (UFCKMSK)
Modification of 21.6.3 (26) UF0 INT & DMARQ register (UF0IDR)
Modification of 21.6.8 (1) UF0 EP1 bulk-in transfer data register (UF0EP1BI)
Modification of 21.6.8 (2) UF0 EP3 bulk-in transfer data register (UF0EP3BI)
Modification of 21.6.9 (1) UF0 EP2 bulk-out transfer data register (UF0EP2BO)
Modification of 21.6.9 (2) UF0 EP4 bulk-out transfer data register (UF0EP4BO)
Addition of 21.9.6 (1) Initial settings for a bulk transfer (OUT: EP2, EP4)
Addition of 21.9.7 (1) Initial settings for a bulk transfer (IN: EP1, EP3)
Modification of Table 31-6. Wiring of V850ES/JG3-H Flash Writing Adapters
Modification of Table 31-7. Wiring of V850ES/JH3-H Flash Writing Adapters
Addition of 31.6 Creating ROM code to place order for previously written product
Modification of “Port registers when CSIF0 is used (a)” in 32.2.3 (5) Securement of
communication serial interface
Modification of “Port registers when CSIF3 is used (a)” in 32.2.3 (5) Securement of
Modification of 33.1 Absolute Maximum Ratings
Addition of 33.4.1 (1) KYOCERA KINSEKI CORPORATION: Crystal resonator
Addition of 33.4.1 (2) KYOCERA CORPORATION: Ceramic resonator
Addition of 33.4.1 (3) Toyama Murata Mfg. Co. Ltd.: Ceramic resonator
Addition of 33.4.2 (1) Seiko Instruments Inc.: Crystal resonator
Modification of 33.5.1 I/O level
Modification of 33.5.2 Supply current
Modification of 33.6 (1) In STOP mode
Modification of 33.9 (1) Basic characteristics
Addition of CHAPTER 35 RECOMMENDED SOLDERING CONDITIONS
Addition of APPENDIX E REVISION HISTORY
Description
APPENDIX E REVISION HISTORY
CHAPTER 5
BUS CONTROL FUNCTIONS
CHAPTER 20
CAN CONTROLLER
CHAPTER 21
USB FUNCTION
CONTROLLER (USBF)
CHAPTER 31
FLASH MEMORY
CHAPTER 32
ON-CHIP DEBUG FUNCTION
CHAPTER 33 ELECTRICAL
SPECIFICATIONS
CHAPTER 35
RECOMMEND SOLDERING
CONDITIONS
APPENDIX E REVISION
HISTORY
Page 1507 of 1509
Chapter
(1/3)

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