UPD70F3765GF-GAT-AX Renesas Electronics America, UPD70F3765GF-GAT-AX Datasheet - Page 1343

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UPD70F3765GF-GAT-AX

Manufacturer Part Number
UPD70F3765GF-GAT-AX
Description
MCU 32BIT V850ES/JX3-H 128-LQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Jx3-Hr
Datasheet

Specifications of UPD70F3765GF-GAT-AX

Core Processor
RISC
Core Size
32-Bit
Speed
48MHz
Connectivity
CSI, EBI/EMI, I²C, UART/USART, USB
Peripherals
DMA, LVD, PWM, WDT
Number Of I /o
96
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
40K x 8
Voltage - Supply (vcc/vdd)
2.85 V ~ 3.6 V
Data Converters
A/D 12x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UPD70F3765GF-GAT-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
V850ES/JG3-H, V850ES/JH3-H
28.3 Registers
R01UH0042EJ0400 Rev.4.00
Sep 30, 2010
The low-voltage detector is controlled by the following registers.
• Low-voltage detection register (LVIM)
• Internal RAM data status register (RAMS)
(1) Low-voltage detection register (LVIM)
The LVIM register is a special register. This can be written only in the special combination of the sequences (see
3.4.8 Special registers).
The LVIM register is used to enable or disable low-voltage detection, and to set the operation mode of the low-
voltage detector.
This register can be read or written in 8-bit or 1-bit units. However, the LVIF bit is read-only.
After reset: 00H
LVIM
Notes 1. Reset by low-voltage detection: 82H
Cautions 1. When the LVION and LVIMD bits to 1, the low-voltage detector cannot be stopped
2. After the LVI operation has started (LVION bit = 1) or when INTLVI has occurred, confirm
LVIF
LVION
LVION
LVIMD
<7>
2. When the LVION bit is set to 1, the comparator in the LVI circuit starts operating.
3. Be sure to set bits 6 to 2 to “0”.
Reset due to other source: 00H
the supply voltage state using the LVIF bit.
0
1
0
1
0
1
Note 1
Note 2
until the reset request due to other than the low-voltage detection is generated.
Wait 0.2 ms or longer by software before checking the voltage at the LVIF bit after
the LVION bit is set.
Disable operation.
Enable operation.
Generates interrupt signal INTLVI when the supply voltage drops or rises across
the detection voltage value.
Generates internal reset signal LVIRES when the supply voltage drops across the
detected voltage value.
When supply voltage > detected voltage, or when operation is disabled
Supply voltage of connected power supply < detected voltage
R/W
6
0
Address: FFFFF890H
Selection of operation mode of low-voltage detection
Low-voltage detection operation enable or disable
5
0
Low-voltage detection flag
4
0
CHAPTER 28 LOW-VOLTAGE DETECTOR (LVI)
3
0
2
0
LVIMD
<1>
LVIF
<0>
Page 1343 of 1509

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