MC9S12E64CFU Freescale Semiconductor, MC9S12E64CFU Datasheet - Page 119

• Manufacturer Part Number: MC9S12E64CFU
• Description: IC MCU 64K FLASH 25MHZ 80-QFP
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of MC9S12E64CFU

• Core Processor: HCS12
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: EBI/EMI, I²C, SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 60
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 2.35 V ~ 2.75 V
• Data Converters: A/D 16x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-QFP
• Data Bus Width: 16 bit
• Data Ram Size: 4 KB
• Interface Type: SCI, SPI
• Maximum Clock Frequency: 25 MHz
• Number Of Programmable I/os: 60
• Number Of Timers: 16 bit
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit
• On-chip Dac: 8 bit, 2 Channel
• For Use With: M68EVB912E128 - BOARD EVAL FOR MC9S12E128/64
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: No RoHS Version Available

Chapter 3
Port Integration Module (PIM9E128V1)
3.1
The port integration module establishes the interface between the peripheral modules and the I/O pins for
for ports AD, M, P, Q, S, T and U.
This section covers:
Each I/O pin can be configured by several registers: input/output selection, drive strength reduction,
enable and select of pull resistors, wired-or mode selection, interrupt enable, and/or status flags.
3.1.1
A standard port has the following minimum features:
Optional features:
Freescale Semiconductor
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Port A, B, E, and K and the BKGD pin
Port AD associated with ATD module (channels 15 through 0) and keyboard wake-up interrupts
Port M connected to 2 DAC, 1 IIC and 1 SCI (SCI2) modules
Port P and port Q connected to PMF module
Port S connected to 2 SCI (SCI0 and SCI1) and 1 SPI modules
Port T connected to 2 TIM (TIM0 and TIM1) modules
Port U connected to 1 TIM (TIM2) and 1 PWM modules
Input/output selection
5-V output drive with two selectable drive strength (or slew rates)
5-V digital and analog input
Input with selectable pull-up or pull-down device
Open drain for wired-OR connections
Interrupt input with glitch filtering
lntroduction
Features
Refer to the MEBI block description chapter for details on p orts A, B, E and
K, and the BKGD pin.
MC9S12E128 Data Sheet, Rev. 1.07
NOTE
119