MC9S12E64CFU Freescale Semiconductor, MC9S12E64CFU Datasheet - Page 147

• Manufacturer Part Number: MC9S12E64CFU
• Description: IC MCU 64K FLASH 25MHZ 80-QFP
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of MC9S12E64CFU

• Core Processor: HCS12
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: EBI/EMI, I²C, SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 60
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 2.35 V ~ 2.75 V
• Data Converters: A/D 16x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-QFP
• Data Bus Width: 16 bit
• Data Ram Size: 4 KB
• Interface Type: SCI, SPI
• Maximum Clock Frequency: 25 MHz
• Number Of Programmable I/os: 60
• Number Of Timers: 16 bit
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit
• On-chip Dac: 8 bit, 2 Channel
• For Use With: M68EVB912E128 - BOARD EVAL FOR MC9S12E128/64
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: No RoHS Version Available

3.3.4.5
Read: Anytime. Write: Anytime.
This register configures whether a pull-up or a pull-down device is activated on configured input pins. If
a pin is configured as output, the corresponding Pull Device Enable Register bit has no effect.
3.3.4.6
Read: Anytime. Write: Anytime.
The Port Q Polarity Select Register selects whether a pull-down or a pull-up device is connected to the pin.
The Port Q Polarity Select Register is effective only when the corresponding Data Direction Register bit
is set to 0 (input) and the corresponding Pull Device Enable Register bit is set to 1.
Freescale Semiconductor
PERQ[6:0]
PPSQ[6:0]
Reset
Reset
Field
Field
6:0
6:0
W
W
R
R
Pull Device Enable Port P
0 Pull-up or pull-down device is disabled.
1 Pull-up or pull-down device is enabled.
Polarity Select Port Q
0 A pull-up device is connected to the associated port Q pin.
1 A pull-down device is connected to the associated port Q pin.
Port Q Pull Device Enable Register (PERQ)
Port Q Polarity Select Register (PPSQ)
0
0
0
0
7
7
= Reserved or Unimplemented
= Reserved or Unimplemented
PERQ6
PPSQ6
Figure 3-27. Port Q Pull Device Enable Register (PERQ)
0
0
6
6
Figure 3-28. Port Q Polarity Select Register (PPSQ)
Table 3-20. PERP Field Descriptions
Table 3-21. PPSP Field Descriptions
PERQ5
PPSQ5
MC9S12E128 Data Sheet, Rev. 1.07
0
0
5
5
PERQ4
PPSQ4
0
0
4
4
Description
Description
PERQ3
PPSQ3
0
0
3
3
Chapter 3 Port Integration Module (PIM9E128V1)
PERQ2
PPSQ2
0
0
2
2
PERQ1
PPSQ1
0
0
1
1
PERQ0
PPSQ0
0
0
0
0
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