MC9S12E64CFU Freescale Semiconductor, MC9S12E64CFU Datasheet - Page 71

• Manufacturer Part Number: MC9S12E64CFU
• Description: IC MCU 64K FLASH 25MHZ 80-QFP
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of MC9S12E64CFU

• Core Processor: HCS12
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: EBI/EMI, I²C, SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 60
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 2.35 V ~ 2.75 V
• Data Converters: A/D 16x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-QFP
• Data Bus Width: 16 bit
• Data Ram Size: 4 KB
• Interface Type: SCI, SPI
• Maximum Clock Frequency: 25 MHz
• Number Of Programmable I/os: 60
• Number Of Timers: 16 bit
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit
• On-chip Dac: 8 bit, 2 Channel
• For Use With: M68EVB912E128 - BOARD EVAL FOR MC9S12E128/64
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: No RoHS Version Available

1.4.37
PS0 is a general purpose input or output. When the Serial Communications Interface 0 (SCI0) receiver is
enabled the PS0 pin is configured as the receive pin RXD0 of SCI0. While in reset and immediately out of
reset the PS0 pin is configured as a high impedance input pin. Consult the Port Integration Module (PIM)
PIM_9E128 block description chapter and the SCI block description chapter for information about pin
configurations.
1.4.38
PT[7:4] are general purpose input or output pins. When the Timer system 1 (TIM1) is enabled they can
also be configured as the TIM1 input capture or output compare pins IOC1[7-4]. While in reset and
immediately out of reset the PT[7:4] pins are configured as a high impedance input pins. Consult the Port
Integration Module (PIM) PIM_9E128 block description chapter and the TIM_16B4C block description
chapter for information about pin configurations.
1.4.39
PT[3:0] are general purpose input or output pins. When the Timer system 0 (TIM0) is enabled they can
also be configured as the TIM0 input capture or output compare pins IOC0[7-4]. While in reset and
immediately out of reset the PT[3:0] pins are configured as a high impedance input pins. Consult the Port
Integration Module (PIM) PIM_9E128 block description chapter and the TIM_16B4C block description
chapter for information about pin configurations.
1.4.40
PU[7:6] are general purpose input or output pins. While in reset and immediately out of reset the PU[7:6]
pins are configured as a high impedance input pins. Consult the Port Integration Module (PIM)
PIM_9E128 for information about pin configurations. PU[7:6] are not available in the 80 pin package
version.
1.4.41
PU[5:4] are general purpose input or output pins. When the Pulse Width Modulator (PWM) is enabled the
PU[5:4] output pins, individually or as a pair, can be configured as PW1[5:4] outputs. While in reset and
immediately out of reset the PU[5:4] pins are configured as a high impedance input pins. Consult the Port
Integration Module (PIM) PIM_9E128 block description chapter and the PWM_8B6C block description
chapter for information about pin configurations. PU[5:4] are not available in the 80 pin package version.
1.4.42
PU[3:0] are general purpose input or output pins. When the Timer system 2 (TIM2) is enabled they can
also be configured as the TIM2 input capture or output compare pins IOC2[7-4]. When the Pulse Width
Modulator (PWM) is enabled the PU[3:0] output pins, individually or as a pair, can be configured as
PW1[3:0] outputs. The MODRR register in the Port Integration Module determines if the TIM2 or PWM
function is selected. While in reset and immediately out of reset the PU[3:0] pins are configured as a high
Freescale Semiconductor
PS0 / RXD0 — Port S I/O Pin 0
PT[7:4] / IOC1[7:4]— Port T I/O Pins [7:4]
PT[3:0] / IOC0[7:4]— Port T I/O Pins [3:0]
PU[7:6] — Port U I/O Pins [7:6]
PU[5:4] / PW1[5:4] — Port U I/O Pins [5:4]
PU[3:0] / IOC2[7:4]/PW1[3:0] — Port U I/O Pins [3:0]
MC9S12E128 Data Sheet, Rev. 1.07
Chapter 1 MC9S12E128 Device Overview (MC9S12E128DGV1)
71