MC9S12E64CFU Freescale Semiconductor, MC9S12E64CFU Datasheet - Page 152

IC MCU 64K FLASH 25MHZ 80-QFP

MC9S12E64CFU

Manufacturer Part Number
MC9S12E64CFU
Description
IC MCU 64K FLASH 25MHZ 80-QFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheets

Specifications of MC9S12E64CFU

Core Processor
HCS12
Core Size
16-Bit
Speed
25MHz
Connectivity
EBI/EMI, I²C, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
60
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.35 V ~ 2.75 V
Data Converters
A/D 16x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
80-QFP
Data Bus Width
16 bit
Data Ram Size
4 KB
Interface Type
SCI, SPI
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
60
Number Of Timers
16 bit
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit
On-chip Dac
8 bit, 2 Channel
For Use With
M68EVB912E128 - BOARD EVAL FOR MC9S12E128/64
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Lead Free Status / Rohs Status
No RoHS Version Available

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Chapter 3 Port Integration Module (PIM9E128V1)
3.3.6
Port T is associated with two 4-channel timers (TIM0 and TIM1). Each pin is assigned to these modules
according to the following priority: TIM1/TIM0 > general-purpose I/O.
If the timer TIM0 is enabled, the channels configured for output compare are available on port T pins
PT[3:0]. If the timer TIM1 is enabled, the channels configured for output compare are available on port T
pins PT[7:4].
Refer to the TIM block description chapter for information on enabling and disabling the TIM module.
During reset, port T pins are configured as high-impedance inputs.
3.3.6.1
Read: Anytime. Write: Anytime.
If the associated data direction bit (DDRTx) is set to 1 (output), a read returns the value of the I/O register
bit. If the associated data direction bit (DDRTx) is set to 0 (input), a read returns the value of the pin.
3.3.6.2
Read: Anytime. Write: Never, writes to this register have no effect.
This register always reads back the status of the associated pins.
152
Reset
Reset
TIM:
W
W
R
R
PTIT7
Port T
PTT7
OC17
Port T I/O Register (PTT)
Port T Input Register (PTIT)
0
u
7
7
= Reserved or Unimplemented
PTIT6
PTT6
OC16
0
u
6
6
Figure 3-37. Port T Input Register (PTIT)
Figure 3-36. Port T I/O Register (PTT)
PTIT5
PTT5
OC15
MC9S12E128 Data Sheet, Rev. 1.07
0
u
5
5
PTIT4
PTT4
OC14
0
u
4
4
u = Unaffected by reset
PTIT3
PTT3
OC07
0
u
3
3
PTIT2
PTT2
OC06
0
u
2
2
Freescale Semiconductor
PTIT1
PTT1
OC05
0
u
1
1
PTIT0
PTT0
OC04
0
u
0
0

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