MC9S12E64CFU Freescale Semiconductor, MC9S12E64CFU Datasheet - Page 302

IC MCU 64K FLASH 25MHZ 80-QFP

MC9S12E64CFU

Manufacturer Part Number
MC9S12E64CFU
Description
IC MCU 64K FLASH 25MHZ 80-QFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheets

Specifications of MC9S12E64CFU

Core Processor
HCS12
Core Size
16-Bit
Speed
25MHz
Connectivity
EBI/EMI, I²C, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
60
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.35 V ~ 2.75 V
Data Converters
A/D 16x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
80-QFP
Data Bus Width
16 bit
Data Ram Size
4 KB
Interface Type
SCI, SPI
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
60
Number Of Timers
16 bit
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit
On-chip Dac
8 bit, 2 Channel
For Use With
M68EVB912E128 - BOARD EVAL FOR MC9S12E128/64
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Lead Free Status / Rohs Status
No RoHS Version Available

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Chapter 10 Inter-Integrated Circuit (IICV2)
10.3.2
This section consists of register descriptions in address order. Each description includes a standard register
diagram with an associated figure number. Details of register bit and field function follow the register
diagrams, in bit order.
10.3.2.1
Read and write anytime
This register contains the address the IIC bus will respond to when addressed as a slave; note that it is not
the address sent on the bus during the address transfer.
302
Reserved
ADR[7:1]
Reset
Field
Register
7:1
0
Name
IBCR
IBDR
IBAD
IBFD
IBSR
W
R
Register Descriptions
ADR7
Slave Address — Bit 1 to bit 7 contain the specific slave address to be used by the IIC bus module.The default
mode of IIC bus is slave mode for an address match on the bus.
Reserved — Bit 0 of the IBAD is reserved for future compatibility. This bit will always read 0.
IIC Address Register (IBAD)
0
7
W
W
W
W
W
R
R
R
R
R
= Unimplemented or Reserved
ADR7
ADR6
IBEN
Bit 7
IBC7
TCF
D7
0
6
Figure 10-2. IIC Bus Address Register (IBAD)
= Unimplemented or Reserved
ADR6
IBC6
IAAS
IBIE
Table 10-1. IIC Register Summary
Table 10-2. IBAD Field Descriptions
D6
6
ADR5
MC9S12E128 Data Sheet, Rev. 1.07
0
5
MS/SL
ADR5
IBC5
IBB
D5
5
ADR4
0
4
Description
ADR4
Tx/Rx
IBC4
IBAL
D4
4
ADR3
0
3
ADR3
TXAK
IBC3
D3
3
0
ADR2
0
2
ADR2
IBC2
RSTA
SRW
D2
2
0
Freescale Semiconductor
ADR1
ADR1
IBC1
IBIF
D1
0
1
1
0
IBSWAI
RXAK
Bit 0
IBC0
D0
0
0
0
0

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