MC9S12E64CFU Freescale Semiconductor, MC9S12E64CFU Datasheet - Page 248

IC MCU 64K FLASH 25MHZ 80-QFP

MC9S12E64CFU

Manufacturer Part Number
MC9S12E64CFU
Description
IC MCU 64K FLASH 25MHZ 80-QFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheets

Specifications of MC9S12E64CFU

Core Processor
HCS12
Core Size
16-Bit
Speed
25MHz
Connectivity
EBI/EMI, I²C, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
60
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.35 V ~ 2.75 V
Data Converters
A/D 16x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
80-QFP
Data Bus Width
16 bit
Data Ram Size
4 KB
Interface Type
SCI, SPI
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
60
Number Of Timers
16 bit
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit
On-chip Dac
8 bit, 2 Channel
For Use With
M68EVB912E128 - BOARD EVAL FOR MC9S12E128/64
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Lead Free Status / Rohs Status
No RoHS Version Available

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Chapter 8 Serial Communication Interface (SCIV3)
8.2
The SCI module has a total of two external pins.
8.2.1
The TXD pin transmits SCI (standard or infrared) data. It will idle high in either mode and is high
impedance anytime the transmitter is disabled.
8.2.2
The RXD pin receives SCI (standard or infrared) data. An idle line is detected as a line high. This input is
ignored when the receiver is disabled and should be terminated to a known voltage.
8.3
This subsection provides a detailed description of all the SCI registers.
8.3.1
The memory map for the SCI module is given in
address offset. The total address for each register is the sum of the base address for the SCI module and
the address offset for each register.
8.3.2
This subsection consists of register descriptions in address order. Each description includes a standard
register diagram with an associated figure number. Writes to reserved register locations do not have any
effect and reads of these locations return a 0. Details of register bit and field function follow the register
diagrams, in bit order.
248
Register
SCIBDH
SCIBDL
SCICR1
Name
External Signal Description
Memory Map and Register Definition
TXD — SCI Transmit Pin
RXD — SCI Receive Pin
Module Memory Map
Register Descriptions
W
W
W
R
R
R
LOOPS
SBR7
IREN
Bit 7
SCISWAI
= Unimplemented or Reserved
Figure 8-2. SCI Registers Summary
SBR6
TNP1
6
MC9S12E128 Data Sheet, Rev. 1.07
RSRC
TNP0
SBR5
5
Figure
SBR12
SBR4
M
4
8-2. The address listed for each register is the
SBR11
WAKE
SBR3
3
SBR10
SBR2
ILT
2
Freescale Semiconductor
SBR9
SBR1
PE
1
SBR8
SBR0
Bit 0
PT

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