MC9S12E64CFU Freescale Semiconductor, MC9S12E64CFU Datasheet - Page 449
MC9S12E64CFU
Manufacturer Part Number
MC9S12E64CFU
Description
IC MCU 64K FLASH 25MHZ 80-QFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Specifications of MC9S12E64CFU
Core Processor
HCS12
Core Size
16-Bit
Speed
25MHz
Connectivity
EBI/EMI, I²C, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
60
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.35 V ~ 2.75 V
Data Converters
A/D 16x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
80-QFP
Data Bus Width
16 bit
Data Ram Size
4 KB
Interface Type
SCI, SPI
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
60
Number Of Timers
16 bit
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit
On-chip Dac
8 bit, 2 Channel
For Use With
M68EVB912E128 - BOARD EVAL FOR MC9S12E128/64
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Lead Free Status / Rohs Status
No RoHS Version Available
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15.2.1
Debugging control logic communicates with external devices serially via the single-wire background
interface pin (BKGD). During reset, this pin is a mode select input which selects between normal and
special modes of operation. After reset, this pin becomes the dedicated serial interface pin for the
background debug mode.
15.2.2
This pin is used to tag the high byte of an instruction. When instruction tagging is on, a logic 0 at the falling
edge of the external clock (ECLK) tags the high half of the instruction word being read into the instruction
queue.
15.2.3
This pin is used to tag the low byte of an instruction. When instruction tagging is on and low strobe is
enabled, a logic 0 at the falling edge of the external clock (ECLK) tags the low half of the instruction word
being read into the instruction queue.
Freescale Semiconductor
•
•
•
•
•
BKGD — Background interface pin
TAGHI — High byte instruction tagging pin
TAGLO — Low byte instruction tagging pin
BKGD and TAGHI share the same pin.
TAGLO and LSTRB share the same pin.
BKGD — Background Interface Pin
TAGHI — High Byte Instruction Tagging Pin
TAGLO — Low Byte Instruction Tagging Pin
Generally these pins are shared as described, but it is best to check the
device overview chapter to make certain. All MCUs at the time of this
writing have followed this pin sharing scheme.
MC9S12E128 Data Sheet, Rev. 1.07
NOTE
Chapter 15 Background Debug Module (BDMV4)
449
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