MC9S12E64CFU Freescale Semiconductor, MC9S12E64CFU Datasheet - Page 518

IC MCU 64K FLASH 25MHZ 80-QFP

MC9S12E64CFU

Manufacturer Part Number
MC9S12E64CFU
Description
IC MCU 64K FLASH 25MHZ 80-QFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheets

Specifications of MC9S12E64CFU

Core Processor
HCS12
Core Size
16-Bit
Speed
25MHz
Connectivity
EBI/EMI, I²C, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
60
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.35 V ~ 2.75 V
Data Converters
A/D 16x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
80-QFP
Data Bus Width
16 bit
Data Ram Size
4 KB
Interface Type
SCI, SPI
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
60
Number Of Timers
16 bit
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit
On-chip Dac
8 bit, 2 Channel
For Use With
M68EVB912E128 - BOARD EVAL FOR MC9S12E128/64
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Lead Free Status / Rohs Status
No RoHS Version Available

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Chapter 18 Multiplexed External Bus Interface (MEBIV3)
18.3
A summary of the registers associated with the MEBI sub-block is shown in
descriptions of the registers and bits are given in the subsections that follow. On most chips the registers
are mappable. Therefore, the upper bits may not be all 0s as shown in the table and descriptions.
18.3.1
518
Memory Map and Register Definition
Address
0x00032
0x00033
0x000A
0x000B
0x000C
0x000D
0x000E
0x001E
0x0000
0x0001
0x0002
0x0003
0x0004
0x0005
0x0006
0x0007
0x0008
0x0009
0x000F
Offset
Module Memory Map
Port A Data Register (PORTA)
Port B Data Register (PORTB)
Data Direction Register A (DDRA)
Data Direction Register B (DDRB)
Reserved
Reserved
Reserved
Reserved
Port E Data Register (PORTE)
Data Direction Register E (DDRE)
Port E Assignment Register (PEAR)
Mode Register (MODE)
Pull Control Register (PUCR)
Reduced Drive Register (RDRIV)
External Bus Interface Control Register (EBICTL)
Reserved
IRQ Control Register (IRQCR)
Port K Data Register (PORTK)
Data Direction Register K (DDRK)
MC9S12E128 Data Sheet, Rev. 1.07
Table 18-2. MEBI Memory Map
Use
Table
18-2. Detailed
Freescale Semiconductor
Access
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R
R
R
R
R

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