MC9S12E64CFU Freescale Semiconductor, MC9S12E64CFU Datasheet - Page 69

IC MCU 64K FLASH 25MHZ 80-QFP

MC9S12E64CFU

Manufacturer Part Number
MC9S12E64CFU
Description
IC MCU 64K FLASH 25MHZ 80-QFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheets

Specifications of MC9S12E64CFU

Core Processor
HCS12
Core Size
16-Bit
Speed
25MHz
Connectivity
EBI/EMI, I²C, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
60
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.35 V ~ 2.75 V
Data Converters
A/D 16x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
80-QFP
Data Bus Width
16 bit
Data Ram Size
4 KB
Interface Type
SCI, SPI
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
60
Number Of Timers
16 bit
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit
On-chip Dac
8 bit, 2 Channel
For Use With
M68EVB912E128 - BOARD EVAL FOR MC9S12E128/64
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Lead Free Status / Rohs Status
No RoHS Version Available

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PIM_9E128 block description chapter and the DAC_8B1C block description chapter for information about
pin configurations.
1.4.26
PM0 is a general purpose input or output pin. When the Digital to Analog module 2 (DAC2) is enabled the
PM0 pin is configured as the analog output DA02 of DAC2. While in reset and immediately out of reset
the PM0 pin is configured as a high impedance input pin. Consult the Port Integration Module (PIM)
PIM_9E128 block description chapter and the DAC_8B1C block description chapter for information about
pin configurations.
1.4.27
PP[5:0] are general purpose input or output pins. When the Pulse width Modulator with Fault protection
(PMF) is enabled the PP[5:0] output pins, as a whole or as pairs, can be configured as PW0[5:0] outputs.
While in reset and immediately out of reset the PP[5:0] pins are configured as a high impedance input pins.
Consult the Port Integration Module (PIM) PIM_9E128 block description chapter and the PMF_15B6C
block description chapter for information about pin configurations.
1.4.28
PQ[6:4] are general purpose input or output pins. When enabled in the Pulse width Modulator with Fault
protection module (PMF), the PQ[6:4] pins become the current status input pins, IS[2:0], for top/bottom
pulse width correction. While in reset and immediately out of reset PP[5:0] pins are configured as a high
impedance input pins. Consult the Port Integration Module (PIM) PIM_9E128 block description chapter
and the PMF_15B6C block description chapter for information about pin configurations.
1.4.29
PQ[3:0] are general purpose input or output pins. When enabled in the Pulse width Modulator with Fault
protection module (PMF), the PQ[3:0] pins become the Fault protection inputs pins, FAULT[3:0], of the
PMF. While in reset and immediately out of reset the PQ[3:0] pins are configured as a high impedance
input pins. Consult the Port Integration Module (PIM) PIM_9E128 block description chapter and the
PMF_15B6C block description chapter for information about pin configurations.
1.4.30
PS7 is a general purpose input or output. When the Serial Peripheral Interface (SPI) is enabled PS7
becomes the slave select pin SS. While in reset and immediately out of reset the PS7 pin is configured as
a high impedance input pin. Consult the Port Integration Module (PIM) PIM_9E128 block description
chapter and the SPI block description chapter for information about pin configurations.
Freescale Semiconductor
PM0 / DAO2 — Port M I/O Pin 0
PP[5:0] / PW0[5:0] — Port P I/O Pins [5:0]
PQ[6:4] / IS[2:0] — Port Q I/O Pins [6:4]
PQ[3:0] / FAULT[3:0] — Port Q I/O Pins [3:0]
PS7 / SS — Port S I/O Pin 7
MC9S12E128 Data Sheet, Rev. 1.07
Chapter 1 MC9S12E128 Device Overview (MC9S12E128DGV1)
69

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