MC9S12E64CFU Freescale Semiconductor, MC9S12E64CFU Datasheet - Page 262

• Manufacturer Part Number: MC9S12E64CFU
• Description: IC MCU 64K FLASH 25MHZ 80-QFP
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of MC9S12E64CFU

• Core Processor: HCS12
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: EBI/EMI, I²C, SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 60
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 2.35 V ~ 2.75 V
• Data Converters: A/D 16x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-QFP
• Data Bus Width: 16 bit
• Data Ram Size: 4 KB
• Interface Type: SCI, SPI
• Maximum Clock Frequency: 25 MHz
• Number Of Programmable I/os: 60
• Number Of Timers: 16 bit
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit
• On-chip Dac: 8 bit, 2 Channel
• For Use With: M68EVB912E128 - BOARD EVAL FOR MC9S12E128/64
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: No RoHS Version Available

Chapter 8 Serial Communication Interface (SCIV3)
8.4.4
8.4.4.1
The SCI transmitter can accommodate either 8-bit or 9-bit data characters. The state of the M bit in SCI
control register 1 (SCICR1) determines the length of data characters. When transmitting 9-bit data, bit T8
in SCI data register high (SCIDRH) is the ninth bit (bit 8).
8.4.4.2
To transmit data, the MCU writes the data bits to the SCI data registers (SCIDRH/SCIDRL), which in turn
are transferred to the transmitter shift register. The transmit shift register then shifts a frame out through
the TXD pin, after it has prefaced them with a start bit and appended them with a stop bit. The SCI data
registers (SCIDRH and SCIDRL) are the write-only buffers between the internal data bus and the transmit
shift register.
The SCI also sets a flag, the transmit data register empty flag (TDRE), every time it transfers data from
the buffer (SCIDRH/L) to the transmitter shift register. The transmit driver routine may respond to this
262
TDRE INTERRUPT REQUEST
CLOCK
BUS
TC INTERRUPT REQUEST
SBR12–SBR0
Transmitter
Transmitter Character Length
Character Transmission
BAUD DIVIDER
PE
PT
M
GENERATION
PARITY
T8
16
Figure 8-13. Transmitter Block Diagram
MC9S12E128 Data Sheet, Rev. 1.07
H
11-BIT TRANSMIT SHIFT REGISTER
8
TDRE
TCIE
TIE
TC
7
6
SCI DATA REGISTERS
5
TRANSMITTER CONTROL
INTERNAL BUS
4
3
2
TE
1
0
SBK
L
CONTROL
LOOP
Freescale Semiconductor
LOOPS
RSRC
TO RECEIVER
SCTXD