MC9S12E64CFU Freescale Semiconductor, MC9S12E64CFU Datasheet - Page 379

• Manufacturer Part Number: MC9S12E64CFU
• Description: IC MCU 64K FLASH 25MHZ 80-QFP
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of MC9S12E64CFU

• Core Processor: HCS12
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: EBI/EMI, I²C, SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 60
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 2.35 V ~ 2.75 V
• Data Converters: A/D 16x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-QFP
• Data Bus Width: 16 bit
• Data Ram Size: 4 KB
• Interface Type: SCI, SPI
• Maximum Clock Frequency: 25 MHz
• Number Of Programmable I/os: 60
• Number Of Timers: 16 bit
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit
• On-chip Dac: 8 bit, 2 Channel
• For Use With: M68EVB912E128 - BOARD EVAL FOR MC9S12E128/64
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: No RoHS Version Available

11.5
All PWM registers are reset to their default values upon any system reset.
11.6
The system bus clock is the only clock required by this module.
Freescale Semiconductor
Resets
Clocks
PWM half-cycle boundaries occur at both the PWM cycle start and when the
counter equals the modulus, so in edge-aligned operation full-cycles and
half-cycles are equal.
Fault protection also applies during software output control when the
OUTCTLx bits are set. Fault clearing still occurs at half PWM cycle
boundaries while the PWM generator is engaged, PWMEN equals one. But
the OUTx bits can control the PWM pins while the PWM generator is off,
PWMEN equals zero. Thus, fault clearing occurs at IPbus cycles while the
PWM generator is off and at the start of PWM cycles when the generator is
engaged.
FAULT0 OR
FAULT1 OR
Figure 11-78. Manual Fault Clearing (Faults 0 & 2) - QSMP=01, 10, or 11
FAULT2
FAULT3
PWMS ENABLED
PWMS ENABLED
Figure 11-79. Manual Fault Clearing (Faults 1 & 3)
MC9S12E128 Data Sheet, Rev. 1.07
PWMS DISABLED
CLEARED
CLEARED
PWMS DISABLED
FFLAGx
FFLAGx
Chapter 11 Pulse Width Modulator with Fault Protection (PMF15B6CV2)
NOTE
NOTE
PWMS ENABLED
PWMS ENABLED
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