MC9S12E64CFU Freescale Semiconductor, MC9S12E64CFU Datasheet - Page 161

• Manufacturer Part Number: MC9S12E64CFU
• Description: IC MCU 64K FLASH 25MHZ 80-QFP
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of MC9S12E64CFU

• Core Processor: HCS12
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: EBI/EMI, I²C, SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 60
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 2.35 V ~ 2.75 V
• Data Converters: A/D 16x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-QFP
• Data Bus Width: 16 bit
• Data Ram Size: 4 KB
• Interface Type: SCI, SPI
• Maximum Clock Frequency: 25 MHz
• Number Of Programmable I/os: 60
• Number Of Timers: 16 bit
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit
• On-chip Dac: 8 bit, 2 Channel
• For Use With: M68EVB912E128 - BOARD EVAL FOR MC9S12E128/64
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: No RoHS Version Available

3.4.6
The Polarity Select Register selects either a pull-up or pull-down device if enabled. The pull device
becomes active only if the pin is used as an input or as a wired-or output.
3.4.7
The following table summarizes the effect of various configuration in the Data Direction (DDR),
Input/Output (I/O), reduced drive (RDR), Pull Enable (PE), Pull Select (PS) and Interrupt Enable (IE)
register bits. The PS configuration bit is used for two purposes:
1
2
Freescale Semiconductor
DDR
Applicable only on Port AD.
Digital outputs are disabled and digital input logic is forced to “1” when an analog module associated with the port is enabled.
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1. Configure the sensitive interrupt edge (rising or falling), if interrupt is enabled.
2. Select either a pull-up or pull-down device if PE is set to “1”.
IO
X
X
X
X
X
X
X
0
1
0
1
0
1
0
1
Polarity Select Register
Pin Configuration Summary
RDR
X
X
X
X
X
X
X
0
0
1
1
0
0
1
1
PE
X
X
X
X
X
X
X
X
0
1
1
0
0
1
1
Table 3-36. Pin Configuration Summary
PS
X
X
X
X
X
0
1
0
1
0
1
0
1
0
1
MC9S12E128 Data Sheet, Rev. 1.07
IE
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
1
Output to 0, Reduced Drive
Output to 1, Reduced Drive
Output to 0, Reduced Drive
Output to 1, Reduced Drive
Output to 0, Full Drive
Output to 1, Full Drive
Output to 0, Full Drive
Output to 1, Full Drive
Function
Input
Input
Input
Input
Input
Input
Input
2
Chapter 3 Port Integration Module (PIM9E128V1)
Pull Device
Pull Down
Pull Down
Disabled
Disabled
Disabled
Disabled
Disabled
Disabled
Disabled
Disabled
Disabled
Disabled
Disabled
Pull Up
Pull Up
Falling Edge
Rising Edge
Falling Edge
Rising Edge
Falling Edge
Rising Edge
Falling Edge
Rising Edge
Interrupt
Disabled
Disabled
Disabled
Disabled
Disabled
Disabled
Disabled
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