71M6531F-IM/F Maxim Integrated Products, 71M6531F-IM/F Datasheet - Page 119

• Manufacturer Part Number: 71M6531F-IM/F
• Description: IC ENERGY METER 256KB 68-QFN
• Manufacturer: Maxim Integrated Products

Specifications of 71M6531F-IM/F

• Mounting Style: SMD/SMT
• Package / Case: QFN-68
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

FDS 6531/6532 005
v1.3
1.2
1.1
1.0
October 21, 2009
July 27, 2009
February 27,
2009
© 2005-2010 TERIDIAN Semiconductor Corporation
18) Updated pin-out for QFN-68 package (Figure 48).
19) Added explanation for InSQRES_X.
20) Added explanation of delay compensation in CE (1.3.5).
21) Added explanation on temperature coefficients for VERF in Appli-
22) Corrected
Updated number range for RTC_ADJ to 0 – 0x7F and tolerance for ex-
posed pad in Figure 46 to 0.1 mm. Corrected bit range for CE_LCTN
to [7:0] and functional description for TMOD[7] and TMOD[3] in Table
22. Added maximum value for WRATE and text stating that registers
RTC_SEC to RTC_YR do not change at reset. Added V LSB entry for
sag detection in CE Interface Description, text regarding hysteresis at
section 3.10, note that VX pin is not supported by standard CE code,
and description of STOP and IDLE bits in PCON register. Changed
value for Wh accuracy percentage on title page (value stated for
room temperature).
Updated mechanical drawing for QFN-68 package.
Replaced Figure 19 with single-phase example.
Corrected LQFP-100 package drawing (Figure 50).
Applied minor corrections and enhancements to diagrams.
Initial release. Changes with respect to PDS v1.3:
1) Corrected Timer/Counter 0/1 label in Table 22.
2) Corrected entries for DIO29 and DIO43 in Table 39.
3) Updated unused/reserved bits in I/O RAM tables, added descrip-
4) Documented blink capability for both SEG18 and SEG19.
5) Changed package for 71M6532D/F to LQFP-100, updated all pin
6) Replaced graph showing system performance specification over
7) Added explanation for hysteresis at the V1 pin in Applications
8) Added note on recommended bypass capacitors C1 and C2 in
9) Removed access to I/O RAM from SPI Port description.
10) Updated numerous parameters in Electrical Specification (tem-
11) Corrected number of pre-boot cycles in Flash Memory Section.
12) Updated entries in I/O RAM table under “Wake” column.
generation (page 89).
cation Section (3.4.1).
tion for WE register.
tables and I/O RAM tables accordingly.
temperature with specification on accuracy of VREF compensa-
tion.
Section.
Electrical Specification.
perature sensor, supply current for mission and battery modes).
Figure 30
(right side).
Data Sheet 71M6531D/F-71M6532D/F
119