71M6531F-IM/F Maxim Integrated Products, 71M6531F-IM/F Datasheet - Page 51

• Manufacturer Part Number: 71M6531F-IM/F
• Description: IC ENERGY METER 256KB 68-QFN
• Manufacturer: Maxim Integrated Products

Specifications of 71M6531F-IM/F

• Mounting Style: SMD/SMT
• Package / Case: QFN-68
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

2) A communication link can be established via the SPI interface: By writing into MPU memory locations,
3) An external DSP can access front-end data generated by the ADC. This mode of operation uses the
FDS 6531/6532 005
Possible applications for the SPI interface are:
1) An external host reads data from CE locations to obtain metering information. This can be used in
v1.3
applications where the 71M6531D/F or 71M6532D/F function as smart front-ends with preprocessing
capability. Since the addresses are in 16-bit format, any type of XRAM data can be accessed: CE,
MPU, I/O RAM, but not SFRs or the 80515-internal register bank.
the external host can initiate and control processes in the MPU of the 71M6531D/F or 71M6532D/F.
Writing to a CE or MPU location normally generates an interrupt, a function that can be used to signal
to the MPU that the byte that had just been written by the external host must be read and processed.
Data can also be inserted by the external host without generating an interrupt.
71M6531D/F or 71M6532D/F as an analog front-end (AFE).
SERIAL READ
SERIAL WRITE
(From 6531)
(From 6531)
(From Host)
(From Host)
PSDO
PSDO
PCSZ
PSCK
PCSZ
PSCK
PSDI
PSDI
x
x
Figure 16: SPI Slave Port: Typical Read and Write operations
SPI0
SPI1
VERSION
CHIP_ID
TRIMSEL
TRIMX
TRIM
C7
C7
0
0
C6
C6
© 2005-2010 TERIDIAN Semiconductor Corporation
Name
8 bit CMD
8 bit CMD
C5
C5
HI Z
C0
C0
7
7
Address (hex)
A15
A15
8
8
A14
A14
20C8
20C9
20FD
20FE
20B0
20B1
20FF
16 bit Address
16 bit Address
A1
A1
HI Z
A0
A0
23
23
Bit Range
D7
D7
24
24
x
4, 0
4, 0
7:0
7:0
4:0
7:0
0
D6
D6
DATA[ADDR]
DATA[ADDR]
Data Sheet 71M6531D/F-71M6532D/F
D1
D1
Read/Write
31
31
D0
D0
RW
RW
RW
RW
R
R
R
D7
D7
32
32
Extended Read . . .
Extended Write . . .
DATA[ADDR+1]
D6
DATA[ADDR+1]
D6
D1
D1
D0
D0
39
39
x
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