71M6531F-IM/F Maxim Integrated Products, 71M6531F-IM/F Datasheet - Page 33

• Manufacturer Part Number: 71M6531F-IM/F
• Description: IC ENERGY METER 256KB 68-QFN
• Manufacturer: Maxim Integrated Products

Specifications of 71M6531F-IM/F

• Mounting Style: SMD/SMT
• Package / Case: QFN-68
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

set whenever the PB is pushed, even if the part is already awake.
Table
If requests of the same priority level are received simultaneously, an internal polling sequence as shown
in
FDS 6531/6532 005
†
even though they are not actually related to an interrupt. These bits are set by hardware when the MPU
wakes from a push button or wake timeout. The bits are reset by writing a zero. Note that the PB flag is
Interrupt Priority Level Structure
All interrupt sources are combined in groups, as shown in
Each group of interrupt sources can be programmed individually to one of four priority levels (as shown in
v1.3
EX4
EX5
EX6
EX_XFER
EX_RTC
IEN_WD_NROVF
IEN_SPI
EX_FWCOL
EX_PLL
The AUTOWAKE and PB flag bits are shown in
Table 35
33) by setting or clearing one bit in the SFR interrupt priority register IP0 and one in IP1
Name
Changing interrupt priorities while interrupts are enabled can easily cause software defects. It is best
to set the interrupt priority registers only once during initialization before interrupts are enabled.
Interrupt Enable
determines which request is serviced first.
SFR B8[3]
SFR B8[4]
SFR B8[5]
2002[0]
2002[1]
20B0[0]
20B0[4]
2007[4]
2007[5]
Location
Group
© 2005-2010 TERIDIAN Semiconductor Corporation
0
1
2
3
4
5
Table 32: Interrupt Priority Level Groups
IP1[x]
Group Members
External interrupt 0, Serial channel 1 interrupt
Timer 0 interrupt, External interrupt 2
External interrupt 1, External interrupt 3
Timer 1 interrupt, External interrupt 4
Serial channel 0 interrupt, External interrupt 5
External interrupt 6
0
0
1
1
Table 33: Interrupt Priority Levels
IEX4
IEX5
IEX6
IE_XFER
IE_RTC
WD_NROVF_FLAG
SPI_FLAG
IE_FWCOL0
IE_FWCOL1
IE_PLLRISE
IE_PLLFALL
IE_WAKE
IE_PB
Name
IP0[x]
Interrupt Flag
Table 31
0
1
0
1
Level 0 (lowest)
Level 1
Level 2
Level 3 (highest)
SFR C0[3]
SFR C0[4]
SFR C0[5]
SFR E8[0]
SFR E8[1]
20B1[0]
20B1[4]
SFR E8[3]
SFR E8[2]
SFR E8[6]
SFR E8[7]
SFR E8[5]
SFR E8[4]
because they behave similarly to interrupt flags,
Table
Location
Priority Level
32:
Data Sheet 71M6531D/F-71M6532D/F
External interrupt 4
External interrupt 5
External interrupt 6
XFER_BUSY interrupt (INT 6)
RTC_1SEC interrupt (INT 6)
WDT near overflow (INT 6)
SPI Interface (INT2)
FWCOL0 interrupt (INT 2)
FWCOL1 interrupt (INT 2)
PLL_OK rise interrupt (INT 4)
PLL_OK fall interrupt (INT 4)
AUTOWAKE flag
PB flag
Interrupt Description
†
†
(Table
34).
33