71M6531F-IM/F Maxim Integrated Products, 71M6531F-IM/F Datasheet - Page 87

• Manufacturer Part Number: 71M6531F-IM/F
• Description: IC ENERGY METER 256KB 68-QFN
• Manufacturer: Maxim Integrated Products

Specifications of 71M6531F-IM/F

• Mounting Style: SMD/SMT
• Package / Case: QFN-68
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

FDS 6531/6532 005
v1.3
TRIMSEL[3:0]
VERSION[7:0]
VREF_CAL
VREF_DIS
WAKE_ARM
WAKE_PRD
WAKE_RES
WD_NROVF_
FLAG
WD_RST
WD_OVF
WE
WRPROT_BT
WRPROT_CE
Name
20FD[3:0]
2006
20C8
2004[7]
2004[3]
20A9[7]
20A9[2:0]
20A9[3]
20B1[0]
SFR F8[7]
2002[2]
201F[7:0]
SFR B2[5]
SFR B2[4]
Location
Reset
001
0
–
–
0
0
0
0
–
0
0
–
0
0
Wake
0
–
–
0
0
–
–
–
0
0
0
–
0
0
© 2005-2010 TERIDIAN Semiconductor Corporation
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Dir
W
W
W
R
R
Selects the trim fuse to be read with the TRIM register:
The device version index. This word may be read by the firmware to determine the
silicon version.
Brings VREF to the VREF pad. This feature is disabled when VREF_DIS =1.
Disables the internal voltage reference.
Arm the autowake timer. Writing a 1 to this bit arms the autowake timer and presets it
with the values presently in WAKE_PRD and WAKE_RES. The autowake timer is reset and
disarmed whenever the IC is in MISSION or BROWNOUT mode. The timer must be
armed at least three RTC cycles before the SLEEP or LCD-ONLY mode is commanded.
Sleep time. Time = WAKE_PRD[2:0]*WAKE_RES. Default = 001. Maximum value is 7.
Resolution of WAKE timer: 1 = 1 minute, 0 = 2.5 seconds.
This flag is set approximately 1 ms before the watchdog timer overflows. It is cleared
by writing a 0 or on the falling edge of WAKE.
WD timer bit. This bit must
this bit are: Write 0xFF: Resets the WDT.
The WD overflow status bit. This bit is set when the WD timer overflows. It is powered
by the nonvolatile supply and at bootup will indicate if the part is recovering from a WD
overflow or a power fault. This bit should be cleared by the MPU on bootup. It is also
automatically cleared when RESET is high.
An 8-bit value has to be written to this address prior to accessing the RTC registers.
When set, this bit protects flash addresses from 0 to BOOT_SIZE*1024 from flash page
erase.
When set, this bit protects flash addresses from CE_LCTN*1024 to the end of memory
from flash page erase.
TRIMSEL[3:0]
VERSION[7:0]
0001 0101
1
TRIMT[7:0]
Silicon Version
A05
Trim Fuse
be accessed with byte operations. Operations possible for
Description
Purpose
Trim for the magnitude of VREF
Data Sheet 71M6531D/F-71M6532D/F
87