71M6531F-IM/F Maxim Integrated Products, 71M6531F-IM/F Datasheet - Page 23

• Manufacturer Part Number: 71M6531F-IM/F
• Description: IC ENERGY METER 256KB 68-QFN
• Manufacturer: Maxim Integrated Products

Specifications of 71M6531F-IM/F

• Mounting Style: SMD/SMT
• Package / Case: QFN-68
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

mnemonics for accumulator-specific instructions refer to accumulator as A, not ACC.
B Register (SFR 0xF0):
The B register is used during multiply and divide instructions. It can also be used as a scratch-pad register
to hold temporary data.
Program Status Word (PSW, SFR 0xD0):
This register contains various flags and control bits for the selection of the register banks (see
PUSH and CALL instructions, causing the stack to begin at location 0x08.
Data Pointer:
The data pointers (DPTR and DPRT1) are 2 bytes wide. The lower part is DPL(SFR 0x82) and DPL1
(SFR0x84) and the highest is DPH (SFR0x83) and DPH1 (SFR 0x85). The data pointers can be loaded as
two registers (e.g. MOV DPL,#data8). They are generally used to access external code or data space
(e.g. MOVC A,@A+DPTR or MOVX A,@DPTR respectively).
Program Counter:
The program counter (PC) is 2 bytes wide and initialized to 0x0000 after reset. The PC is incremented
when fetching operation code or when operating on data from program memory.
Port Registers:
The I/O ports are controlled by Special Function Registers P0, P1 and P2 as shown in
of the SFR can be observed on corresponding pins on the chip. Writing a 1 to any of the ports causes the
corresponding pin to be at high level (V3P3). Writing a 0 causes the corresponding pin to be held at a low
level (GND). The data direction registers DIR0, DIR1 and DIR2 define individual pins as input or output
pins (see Sections
FDS 6531/6532 005
Accumulator (ACC, A, SFR 0xE0):
ACC is the accumulator register. Most instructions use the accumulator to hold the operand. The
Stack Pointer (SP, SFR 0x81):
The stack pointer is a 1-byte register initialized to 0x07 after reset. This register is incremented before
v1.3
PSW Bit
7
6
5
4
3
2
1
0
Symbol
RS1
RS0
OV
CV
AC
F0
P
-
1.5.7 Digital I/O – 71M6531D/F
© 2005-2010 TERIDIAN Semiconductor Corporation
Carry flag.
Auxiliary Carry flag for BCD operations.
General-purpose Flag 0 available for user.
Register bank select control bits. The contents of RS1 and RS0 select the
working register bank:
Overflow flag.
User defined flag.
Parity flag, affected by hardware to indicate odd or even number of one bits in
the Accumulator, i.e. even parity.
Table 11: PSW Bit Functions (SFR 0xD0)
F0 is not to be confused with the F0 flag in the CESTATUS register.
RS1/RS0
00
01
10
11
or
Bank selected
1.5.8 Digital I/O –
Bank 0
Bank 1
Bank 2
Bank 3
Function
Data Sheet 71M6531D/F-71M6532D/F
71M6532D/F).
0x00 – 0x07
0x08 – 0x0F
0x10 – 0x17
0x18 – 0x1F
Location
Table
12. The contents
Table
11).
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