71M6531F-IM/F Maxim Integrated Products, 71M6531F-IM/F Datasheet - Page 13

• Manufacturer Part Number: 71M6531F-IM/F
• Description: IC ENERGY METER 256KB 68-QFN
• Manufacturer: Maxim Integrated Products

Specifications of 71M6531F-IM/F

• Mounting Style: SMD/SMT
• Package / Case: QFN-68
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

controlled by CROSS, in the A position, the output voltage is:
With all switches set to the B position by applying the inverted CROSS signal, the output voltage is:
Thus, when CROSS is toggled, e.g. after each multiplexer cycle, the offset will alternately appear on the
output as positive and negative, which results in the offset effectively being eliminated, regardless of its
polarity or magnitude.
When CROSS is high, the connection of the amplifier input devices is reversed. This preserves the overall
polarity of that amplifier gain; it inverts its input offset. By alternately reversing the connection, the
amplifier’s offset is averaged to zero. This removes the most significant long-term drift mechanism in the
voltage reference. The CHOP_E[1:0] field controls the behavior of CROSS. The CROSS signal will reverse
the amplifier connection in the voltage reference in order to negate the effects of its offset. On the first
CK32 rising edge after the last multiplexer state of its sequence, the multiplexer will wait one additional
CK32 cycle before beginning a new frame. At the beginning of this cycle, the value of CROSS will be
updated according to the CHOP_E[1:0] field. The extra CK32 cycle allows time for the chopped VREF to
settle. During this cycle, MUXSYNC is held high. The leading edge of MUXSYNC initiates a pass
through the CE program sequence. The beginning of the sequence is the serial readout of the four RTM
words.
CHOP_E[1:0] has four states: positive, reverse and two toggle states. In the positive state, CHOP_E[1:0]
= 01, CROSS and CHOP_CLK are held low. In the reverse state, CHOP_E[1:0] = 10, CROSS and
CHOP_CLK are held high. In the first toggle state, CHOP_E[1:0] = 00, CROSS is automatically toggled
near the end of each multiplexer frame and an ALT frame is forced during the last multiplexer frame in each
SUM cycle. It is desirable that CROSS take on alternate values during each ALT frame. For this reason,
if CHOP_E[1:0] = 00, CROSS will not toggle at the end of the multiplexer frame immediately preceding
the ALT frame in each accumulation interval.
Figure 4
interval, CROSS is low, at the end of the second interval, CROSS is high. The offset error for the two
temperature measurements taken during the ALT multiplexer frames will be averaged to zero. Note that
FDS 6531/6532 005
It is assumed that an offset voltage Voff appears at the positive amplifier input. With all switches, as
v1.3
1
2
Voutp – Voutn = G (Vinp + Voff – Vinn) = G (Vinp – Vinn) + G Voff
Voutn – Voutp = G (Vinn – Vinp + Voff) = G (Vinn – Vinp) + G Voff, or
Voutp – Voutn = G (Vinp – Vinn) - G Voff
shows CROSS over two accumulation interval when CHOP_E[1:0] = 00: At the end of the first
3
Accumulation interval n
4
Alternative MUX cycle
V
V
Multiplexer frames
inp
inn
CROSS
Figure 3: General Topology of a Chopped Amplifier
© 2005-2010 TERIDIAN Semiconductor Corporation
CROSS
Figure 4: CROSS Signal with CHOP_E[1:0] = 00
A
B
A
B
2519 2520
+
-
G
1
2
3
A
B
B
A
Accumulation interval n+1
Data Sheet 71M6531D/F-71M6532D/F
4
Alternative MUX cycle
Multiplexer frames
CROSS
V
V
outp
outn
2519 2520
13