71M6531F-IM/F Maxim Integrated Products, 71M6531F-IM/F Datasheet - Page 49

• Manufacturer Part Number: 71M6531F-IM/F
• Description: IC ENERGY METER 256KB 68-QFN
• Manufacturer: Maxim Integrated Products

Specifications of 71M6531F-IM/F

• Mounting Style: SMD/SMT
• Package / Case: QFN-68
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

PCSZ, PCLK, PSDI and PSDO pins. These pins are multiplexed with the LCD segment driver pins SEG3
to SEG6. The port pins default to LCD driver pins. The port is enabled by setting the SPE bit.
During this state, PSDO is held in HiZ state and all transitions on PCLK and PSDI are ignored. When
PCSZ falls, the port will begin the transaction on the first rising edge of PCLK. A transaction consists of
an 8-bit command, a 16-bit address and then one or more bytes of data. The transaction ends when
PCSZ is raised. Some transactions may consist of a command only.
SP_CMD and SP_ADDR.
commands are described in
FDS 6531/6532 005
1.5.15 SPI Slave Port
The slave SPI port communicates directly with the MPU data bus and is able to read and write Data RAM
locations. It is also able to send commands to the MPU. The interface to the slave port consists of the
v1.3
A typical SPI transaction is as follows. While PCSZ is high, the port is held in an initialized/reset state.
The last SPI command and address (if part of the command) are available to the MPU in registers
The SPI port supports data transfers at 1 Mb/s in mission mode and 16 kb/s in brownout mode. The SPI
SDATA output Z
SDATA (output)
EECTRL Byte Written
SCLK (output)
Write -- With HiZ and WFR
Write -- No HiZ
BUSY (bit)
SDATA output Z
SDATA output Z
SDATA (input)
EECTRL Byte Written
SCLK (output)
SDATA (out/in)
EECTRL Byte Written
SCLK (output)
BUSY (bit)
BUSY (bit)
READ
Figure 15: 3-Wire Interface. Write Command when HiZ=1 and WFR=1
Figure 14: 3-Wire Interface. Write Command when CNT=0
D7
INT5 not issued
© 2005-2010 TERIDIAN Semiconductor Corporation
Table 49
Figure 13: 3-Wire Interface. Read Command.
(LoZ)
D7
CNT Cycles (0 shown)
D7
and in
D6
Figure 16
D6
CNT Cycles (8 shown)
(From 6520)
CNT Cycles (6 shown)
(HiZ)
(LoZ)
D5
D5
SDATA output Z
SDATA (output)
EECTRL Byte Written
illustrate the SPI Interface read and write timing.
SCLK (output)
D4
BUSY (bit)
Write -- HiZ
D4
D3
Data Sheet 71M6531D/F-71M6532D/F
D3
D2
INT5 not issued
D2
(From EEPROM)
(HiZ)
(HiZ)
BUSY
D1
CNT Cycles (0 shown)
D0
INT5
READY
INT5
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