AT91SAM7X128 Atmel, AT91SAM7X128 Datasheet - Page 104

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AT91SAM7X128

Manufacturer Part Number
AT91SAM7X128
Description
MCU 32-Bit 91S ARM7TDMI RISC 128KB Flash 1.8V/3.3V 100-Pin LQFP
Manufacturer
Atmel
Datasheet

Specifications of AT91SAM7X128

Package
100LQFP
Device Core
ARM7TDMI
Family Name
91S
Maximum Speed
55 MHz
Ram Size
32 KB
Program Memory Size
128 KB
Operating Supply Voltage
1.8|3.3 V
Data Bus Width
32 Bit
Program Memory Type
Flash
Number Of Programmable I/os
62
Interface Type
CAN/Ethernet/SPI/I2S/TWI/USART/USB
On-chip Adc
8-chx10-bit
Operating Temperature
-40 to 85 °C
Number Of Timers
3

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19.2.2
104
AT91SAM7X512/256/128 Preliminary
Read Operations
Figure 19-1. Embedded Flash Memory Mapping
An optimized controller manages embedded Flash reads. A system of 2 x 32-bit buffers is added
in order to start access at following address during the second read, thus increasing perfor-
mance when the processor is running in Thumb mode (16-bit instruction set). See
Figure 19-3
This optimization concerns only Code Fetch and not Data.
The read operations can be performed with or without wait state. Up to 3 wait states can be pro-
grammed in the field FWS (Flash Wait State) in the Flash Mode Register MC_FMR (see
Flash Mode Register” on page
the embedded Flash.
The Flash memory is accessible through 8-, 16- and 32-bit reads.
As the Flash block size is smaller than the address space reserved for the internal memory area,
the embedded Flash wraps around the address space and appears to be repeated within it.
and
Start Address
Figure
19-4.
Lock Region (n-1)
Flash Memory
Lock Region 0
Lock Region 1
114). Defining FWS to be 0 enables the single-cycle access of
32-bit wide
Lock Bit n-1
Lock Bit 0
Lock Bit 1
Page ( (n-1)*m )
Page (n*m-1)
Page (m-1)
Page 0
6120H–ATARM–17-Feb-09
Figure
19-2,
“MC

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