AT91SAM7X128 Atmel, AT91SAM7X128 Datasheet - Page 556

• Manufacturer Part Number: AT91SAM7X128
• Description: MCU 32-Bit 91S ARM7TDMI RISC 128KB Flash 1.8V/3.3V 100-Pin LQFP
• Manufacturer: Atmel

Specifications of AT91SAM7X128

• Package: 100LQFP
• Device Core: ARM7TDMI
• Family Name: 91S
• Maximum Speed: 55 MHz
• Ram Size: 32 KB
• Program Memory Size: 128 KB
• Operating Supply Voltage: 1.8|3.3 V
• Data Bus Width: 32 Bit
• Program Memory Type: Flash
• Number Of Programmable I/os: 62
• Interface Type: CAN/Ethernet/SPI/I2S/TWI/USART/USB
• On-chip Adc: 8-chx10-bit
• Operating Temperature: -40 to 85 °C
• Number Of Timers: 3

36.8.16
Name:
Access Type:
These register fields are updated each time a message transfer is received or aborted.
MMI is cleared by reading the CAN_MSRx register.
MRDY, MABT are cleared by writing MTCR or MACR in the CAN_MCRx register.
Warning: MRTR and MDLC state depends partly on the mailbox object type.
• MTIMESTAMP: Timer value
This field is updated only when time-triggered operations are disabled (TTM cleared in CAN_MR register). If the TEOF field
in the CAN_MR register is cleared, TIMESTAMP is the internal timer value at the start of frame of the last message
received or sent by the mailbox. If the TEOF field in the CAN_MR register is set, TIMESTAMP is the internal timer value at
the end of frame of the last message received or sent by the mailbox.
In Time Triggered Mode, MTIMESTAMP is set to 0.
• MDLC: Mailbox Data Length Code
6120H–ATARM–17-Feb-09
MTIMESTAMP15 MTIMESTAMP14 MTIMESTAMP13 MTIMESTAMP12 MTIMESTAMP11 MTIMESTAMP10
MTIMESTAMP7
Mailbox Object Type
Receive
Receive with overwrite
Transmit
Consumer
Producer
MRDY
31
23
15
–
7
CAN Message Status Register
MTIMESTAMP6
MABT
30
22
14
Read-only
–
6
CAN_MSRx
MTIMESTAMP5
Description
Length of the first mailbox message received
Length of the last mailbox message received
No action
Length of the mailbox message received
Length of the mailbox message to be sent after the remote frame reception
29
21
13
–
–
5
MTIMESTAMP4
MRTR
AT91SAM7X512/256/128 Preliminary
28
20
12
–
4
MTIMESTAMP3
27
19
11
–
3
MTIMESTAMP2
26
18
10
–
2
MDLC
MTIMESTAMP9
MTIMESTAMP1
25
17
–
9
1
MTIMESTAMP8
MTIMESTAMP0
MMI
24
16
8
0
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