AT91SAM7X128 Atmel, AT91SAM7X128 Datasheet - Page 299

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AT91SAM7X128

Manufacturer Part Number
AT91SAM7X128
Description
MCU 32-Bit 91S ARM7TDMI RISC 128KB Flash 1.8V/3.3V 100-Pin LQFP
Manufacturer
Atmel
Datasheet

Specifications of AT91SAM7X128

Package
100LQFP
Device Core
ARM7TDMI
Family Name
91S
Maximum Speed
55 MHz
Ram Size
32 KB
Program Memory Size
128 KB
Operating Supply Voltage
1.8|3.3 V
Data Bus Width
32 Bit
Program Memory Type
Flash
Number Of Programmable I/os
62
Interface Type
CAN/Ethernet/SPI/I2S/TWI/USART/USB
On-chip Adc
8-chx10-bit
Operating Temperature
-40 to 85 °C
Number Of Timers
3

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29.6.5
Register Name:
Access Type:
• TXCOMP: Transmission Completed
0 = During the length of the current frame.
1 = When both holding and shift registers are empty and STOP condition has been sent, or when MSEN is set (enable
TWI).
• RXRDY: Receive Holding Register Ready
0 = No character has been received since the last TWI_RHR read operation.
1 = A byte has been received in the TWI_RHR since the last read.
• TXRDY: Transmit Holding Register Ready
0 = The transmit holding register has not been transferred into shift register. Set to 0 when writing into TWI_THR register.
1 = As soon as data byte is transferred from TWI_THR to internal shifter or if a NACK error is detected, TXRDY is set at the
same time as TXCOMP and NACK. TXRDY is also set when MSEN is set (enable TWI).
• NACK: Not Acknowledged
0 = Each data byte has been correctly received by the far-end side TWI slave component.
1 = A data byte has not been acknowledged by the slave component. Set at the same time as TXCOMP. Reset after read.
6120H–ATARM–17-Feb-09
31
23
15
7
TWI Status Register
30
22
14
TWI_SR
Read-only
6
29
21
13
5
AT91SAM7X512/256/128 Preliminary
28
20
12
4
27
19
11
3
TXRDY
26
18
10
2
RXRDY
25
17
9
1
TXCOMP
NACK
24
16
8
0
299

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