AT91SAM7X128 Atmel, AT91SAM7X128 Datasheet - Page 485

• Manufacturer Part Number: AT91SAM7X128
• Description: MCU 32-Bit 91S ARM7TDMI RISC 128KB Flash 1.8V/3.3V 100-Pin LQFP
• Manufacturer: Atmel

Specifications of AT91SAM7X128

• Package: 100LQFP
• Device Core: ARM7TDMI
• Family Name: 91S
• Maximum Speed: 55 MHz
• Ram Size: 32 KB
• Program Memory Size: 128 KB
• Operating Supply Voltage: 1.8|3.3 V
• Data Bus Width: 32 Bit
• Program Memory Type: Flash
• Number Of Programmable I/os: 62
• Interface Type: CAN/Ethernet/SPI/I2S/TWI/USART/USB
• On-chip Adc: 8-chx10-bit
• Operating Temperature: -40 to 85 °C
• Number Of Timers: 3

35. Analog-to-Digital Converter (ADC)
35.1
35.2
Figure 35-1. Analog-to-Digital Converter Block Diagram
6120H–ATARM–17-Feb-09
Overview
Block Diagram
Analog Inputs
with I/O lines
Multiplexed
Dedicated
Analog
Inputs
ADVREF
ADTRG
VDDIN
AD-
AD-
AD-
AD-
AD-
AD-
GND
The ADC is based on a Successive Approximation Register (SAR) 10-bit Analog-to-Digital Con-
verter (ADC). It also integrates an 8-to-1 analog multiplexer, making possible the analog-to-
digital conversions of 8 analog lines. The conversions extend from 0V to ADVREF.
The ADC supports an 8-bit or 10-bit resolution mode, and conversion results are reported in a
common register for all channels, as well as in a channel-dedicated register. Software trigger,
external trigger on rising edge of the ADTRG pin or internal triggers from Timer Counter out-
put(s) are configurable.
The ADC also integrates a Sleep Mode and a conversion sequencer and connects with a PDC
channel. These features reduce both power consumption and processor intervention.
Finally, the user can configure ADC timings, such as Startup Time and Sample & Hold Time.
PIO
Selection
Channels
Trigger
Counter
Timer
AT91SAM7X512/256/128 Preliminary
Analog-to-Digital
Approximation
ADC cell
Successive
Converter
Register
ADC Controller
Interface
Control
PMC
Logic
User
MCK
ADC Interrupt
PDC
AIC
Peripheral Bridge
ASB
APB
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