AT91SAM7X128 Atmel, AT91SAM7X128 Datasheet - Page 94
AT91SAM7X128
Manufacturer Part Number
AT91SAM7X128
Description
MCU 32-Bit 91S ARM7TDMI RISC 128KB Flash 1.8V/3.3V 100-Pin LQFP
Manufacturer
Atmel
Datasheet
1.AT91SAM7X512-AU-999.pdf
(687 pages)
Specifications of AT91SAM7X128
Package
100LQFP
Device Core
ARM7TDMI
Family Name
91S
Maximum Speed
55 MHz
Ram Size
32 KB
Program Memory Size
128 KB
Operating Supply Voltage
1.8|3.3 V
Data Bus Width
32 Bit
Program Memory Type
Flash
Number Of Programmable I/os
62
Interface Type
CAN/Ethernet/SPI/I2S/TWI/USART/USB
On-chip Adc
8-chx10-bit
Operating Temperature
-40 to 85 °C
Number Of Timers
3
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18.3
18.3.1
18.3.2
94
Functional Description
AT91SAM7X512/256/128 Preliminary
Bus Arbiter
Address Decoder
The Memory Controller handles the internal ASB bus and arbitrates the accesses of up to three
masters.
It is made up of:
The MC handles only little-endian mode accesses. The masters work in little-endian mode only.
The Memory Controller has a simple, hard-wired priority bus arbiter that gives the control of the
bus to one of the three masters. The EMAC has the highest priority; the Peripheral DMA Control-
ler has the medium priority; the ARM processor has the lowest one.
The Memory Controller features an Address Decoder that first decodes the four highest bits of
the 32-bit address bus and defines three separate areas:
Figure 18-2
Figure 18-2. Memory Areas
• A bus arbiter
• An address decoder
• An abort status
• A misalignment detector
• An Embedded Flash Controller
• One 256-Mbyte address space for the internal memories
• One 256-Mbyte address space reserved for the embedded peripherals
• An undefined address space of 3584M bytes representing fourteen 256-Mbyte areas that
return an Abort if accessed
shows the assignment of the 256-Mbyte memory areas.
14 x 256MBytes
256M Bytes
256M Bytes
3,584 Mbytes
0x0000 0000
0xF000 0000
0x0FFF FFFF
0xEFFF FFFF
0xFFFF FFFF
0x1000 0000
Internal Memories
Peripherals
Undefined
(Abort)
6120H–ATARM–17-Feb-09
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