AT91SAM7X128 Atmel, AT91SAM7X128 Datasheet - Page 2

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AT91SAM7X128

Manufacturer Part Number
AT91SAM7X128
Description
MCU 32-Bit 91S ARM7TDMI RISC 128KB Flash 1.8V/3.3V 100-Pin LQFP
Manufacturer
Atmel
Datasheet

Specifications of AT91SAM7X128

Package
100LQFP
Device Core
ARM7TDMI
Family Name
91S
Maximum Speed
55 MHz
Ram Size
32 KB
Program Memory Size
128 KB
Operating Supply Voltage
1.8|3.3 V
Data Bus Width
32 Bit
Program Memory Type
Flash
Number Of Programmable I/os
62
Interface Type
CAN/Ethernet/SPI/I2S/TWI/USART/USB
On-chip Adc
8-chx10-bit
Operating Temperature
-40 to 85 °C
Number Of Timers
3

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2
Real-time Timer (RTT)
Two Parallel Input/Output Controllers (PIO)
Thirteen Peripheral DMA Controller (PDC) Channels
One USB 2.0 Full Speed (12 Mbits per second) Device Port
One Ethernet MAC 10/100 base-T
One Part 2.0A and Part 2.0B Compliant CAN Controller
One Synchronous Serial Controller (SSC)
Two Universal Synchronous/Asynchronous Receiver Transmitters (USART)
Two Master/Slave Serial Peripheral Interfaces (SPI)
One Three-channel 16-bit Timer/Counter (TC)
One Four-channel 16-bit Power Width Modulation Controller (PWMC)
One Two-wire Interface (TWI)
One 8-channel 10-bit Analog-to-Digital Converter, Four Channels Multiplexed with Digital I/Os
SAM-BA
IEEE
5V-tolerant I/Os, Including Four High-current Drive I/O lines, Up to 16 mA Each
Power Supplies
Fully Static Operation: Up to 55 MHz at 1.65V and 85° C Worst Case Conditions
Available in 100-lead LQFP Green and 100-ball TFBGA Green Packages
– 32-bit Free-running Counter with Alarm
– Runs Off the Internal RC Oscillator
– Sixty-two Programmable I/O Lines Multiplexed with up to Two Peripheral I/Os
– Input Change Interrupt Capability on Each I/O Line
– Individually Programmable Open-drain, Pull-up Resistor and Synchronous Output
– On-chip Transceiver, 1352-byte Configurable Integrated FIFOs
– Media Independent Interface (MII) or Reduced Media Independent Interface (RMII)
– Integrated 28-byte FIFOs and Dedicated DMA Channels for Transmit and Receive
– Eight Fully-programmable Message Object Mailboxes, 16-bit Time Stamp Counter
– Independent Clock and Frame Sync Signals for Each Receiver and Transmitter
– I²S Analog Interface Support, Time Division Multiplex Support
– High-speed Continuous Data Stream Capabilities with 32-bit Data Transfer
– Individual Baud Rate Generator, IrDA
– Support for ISO7816 T0/T1 Smart Card, Hardware Handshaking, RS485 Support
– Full Modem Line Support on USART1
– 8- to 16-bit Programmable Data Length, Four External Peripheral Chip Selects
– Three External Clock Inputs, Two Multi-purpose I/O Pins per Channel
– Double PWM Generation, Capture/Waveform Mode, Up/Down Capability
– Master Mode Support Only, All Two-wire Atmel EEPROMs and I
– Default Boot program
– Interface with SAM-BA Graphic User Interface
– Embedded 1.8V Regulator, Drawing up to 100 mA for the Core and External Components
– 3.3V VDDIO I/O Lines Power Supply, Independent 3.3V VDDFLASH Flash Power Supply
– 1.8V VDDCORE Core Power Supply with Brownout Detector
®
1149.1 JTAG Boundary Scan on All Digital Pins
AT91SAM7X512/256/128 Preliminary
®
Boot Assistance
®
Infrared Modulation/Demodulation
2
C Compatible Devices Supported
6120H–ATARM–17-Feb-09

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