AT91SAM7X128 Atmel, AT91SAM7X128 Datasheet - Page 530

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AT91SAM7X128

Manufacturer Part Number
AT91SAM7X128
Description
MCU 32-Bit 91S ARM7TDMI RISC 128KB Flash 1.8V/3.3V 100-Pin LQFP
Manufacturer
Atmel
Datasheet

Specifications of AT91SAM7X128

Package
100LQFP
Device Core
ARM7TDMI
Family Name
91S
Maximum Speed
55 MHz
Ram Size
32 KB
Program Memory Size
128 KB
Operating Supply Voltage
1.8|3.3 V
Data Bus Width
32 Bit
Program Memory Type
Flash
Number Of Programmable I/os
62
Interface Type
CAN/Ethernet/SPI/I2S/TWI/USART/USB
On-chip Adc
8-chx10-bit
Operating Temperature
-40 to 85 °C
Number Of Timers
3

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Figure 36-18. Consumer Handling
36.7.4
36.7.4.1
Figure 36-19. Mailbox Timestamp
6120H–ATARM–17-Feb-09
MTIMESTAMP
MTIMESTAMP
(CAN_MCRx)
(CAN_MSRx)
(CAN_MSRx)
TIMESTAMP
(CAN_TSTP)
CAN_MDHx)
(CAN_MSRx)
(CAN_MDLx
(CAN_MSRy)
(CAN_MR)
CAN BUS
CAN BUS
CAN_TIM
TEOF
MRDY
MTCR
MMI
CAN Controller Timing Modes
Timestamping Mode
Using the free running 16-bit internal timer, the CAN controller can be set in one of the two fol-
lowing timing modes:
Timestamping Mode is enabled by clearing the TTM bit in the CAN_MR register. Time Triggered
Mode is enabled by setting the TTM bit in the CAN_MR register.
Each mailbox has its own timestamp value. Each time a message is sent or received by a mail-
box, the 16-bit value MTIMESTAMP of the CAN_TIMESTP register is transferred to the LSB bits
of the CAN_MSRx register. The value read in the CAN_MSRx register corresponds to the inter-
nal timer value at the Start Of Frame or the End Of Frame of the message handled by the
mailbox.
Remote Frame
Timestamp 1
• Timestamping Mode: The value of the internal timer is captured at each Start Of Frame or
• Time Triggered Mode: The mailbox transfer operation is triggered when the internal timer
Timestamp 1
Message 1
each End Of Frame.
reaches the mailbox trigger.
Start of Frame
Message x
AT91SAM7X512/256/128 Preliminary
End of Frame
Message x
Remote Frame
Message 2
Message y
Timestamp 2
Timestamp 2
Message y
530

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