AT91SAM7X128 Atmel, AT91SAM7X128 Datasheet - Page 669

• Manufacturer Part Number: AT91SAM7X128
• Description: MCU 32-Bit 91S ARM7TDMI RISC 128KB Flash 1.8V/3.3V 100-Pin LQFP
• Manufacturer: Atmel

Specifications of AT91SAM7X128

• Package: 100LQFP
• Device Core: ARM7TDMI
• Family Name: 91S
• Maximum Speed: 55 MHz
• Ram Size: 32 KB
• Program Memory Size: 128 KB
• Operating Supply Voltage: 1.8|3.3 V
• Data Bus Width: 32 Bit
• Program Memory Type: Flash
• Number Of Programmable I/os: 62
• Interface Type: CAN/Ethernet/SPI/I2S/TWI/USART/USB
• On-chip Adc: 8-chx10-bit
• Operating Temperature: -40 to 85 °C
• Number Of Timers: 3

42. Revision History
6120H–ATARM–17-Feb-09
Version
6120H
Comments
Overview:
Table 3-1, “Signal Description List”
Section 6.1 ”JTAG Port Pins”, Section 6.2 ”Test Pin”
Section 8.4.3 ”Internal Flash”,
Remap Command.”
Figure 9-1,”System Controller Block Diagram”,
”Features”,
ADC:
Section 35.6.2 ”ADC Mode
“SHTIM: Sample & Hold Time” on page 495
Figure 35-1,”Analog-to-Digital Converter Block
Figure 35.5.5,”Conversion
AIC:
Section 23.8.16 ”AIC Spurious Interrupt Vector
Section 23.7.5 ”Protect
CAN:
Section 36.6.4.6 ”Error Interrupt
Section 36.8.5 ”CAN Status
ERRA, ERP.
DBGU:
Section 26.1
FFPI:
Section 20.2 ”Parallel Fast Flash
and Crystal Oscillator
Section 20.3 ”Serial Fast Flash
Crystal Oscillator
PMC:
”PMC System Clock Enable
Register”, bit field 11 contains PCK3.
PWM:
Section 33.6.12 ”PWM Channel Counter
RSTC:
Section 13.2.4.4 ”Software
SSC:
Section 31.8.3 ”SSC Receive Clock Mode
”Debug Unit
”Overview”, ...” two-pin UART can be used standalone for general purpose serial communication.” 5846
The most recent version appears first in the tables that follow.
Mode”, writing PROT in AIC_DCR enables protection mode (3rd paragraph).
(DBGU)”, added
Triggers”, update to the third paragraph detailing hardware trigger.
Reset”, PERRST must be used with PROCRST, except for debug purposes.
Register”, PRESCAL and STARTUP bit fields widened.
Register”, added references to the new chapter in bit descriptions, WARN, BOFF,
Register”,
updated: “At any time, the Flash is mapped ... if GPNVM bit 2 is set and before the
Programming”,
Handler”, added to datasheet.
Programming”,
footnote added to JTAGSEL, ERASE and TST pin comments.
”PMC System Clock Disable Register”
Register”, typos corrected in bit description.
”Mode for General Purpose 2-wire UART Serial Communication”
Register”, corrected bit name to STTDLY.
AT91SAM7X512/256/128 Preliminary
formula updated in bit description.
Section 20.3.1 ”Device
RTT is reset by power_on_reset.
Diagram”, VDDANA replaced by VDDIN. PMC added to figure.
Register”, typo fixed in bit fields. (SIQV is SIVR).
Section 20.2.1 ”Device
and
Section 6.4 ”ERASE Pin”,
Configuration”, added status of PIOs and
Configuration”, added status of PIOs
and
”PMC System Clock Status
updated.
Change
Request
Ref.
5064
5850
5223
5846
4430
5254
rfo
4749
5193
4736
5989
5722
5185
669