PEB 4364 T V1.2 Infineon Technologies, PEB 4364 T V1.2 Datasheet - Page 112

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PEB 4364 T V1.2

Manufacturer Part Number
PEB 4364 T V1.2
Description
IC SLIC VOICE ACCESS PDSO-36
Manufacturer
Infineon Technologies
Series
DuSLICr
Datasheet

Specifications of PEB 4364 T V1.2

Function
Dual Channel Subscriber Line Interface Circuit (DuSLIC)
Interface
IOM-2, PCM
Number Of Circuits
2
Voltage - Supply
3.3 V ~ 5 V
Current - Supply
105mA
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
36-PDSO
Includes
DTMF Generator and Decoder, Line Echo Cancellation (LEC), Teletax (TTX) Generation, Universal Tone Detection (UTD)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Power (watts)
-
Other names
PEB4364TV1.2XT
SP000007728
Assumption:
Sequence to determine the loop resistance R
If the loop resistor connected between Ring and Tip is 1000
the expected current will be 30 mA, because the actual voltage applied to Ring and Tip
is 30 V. Considering the fact that the current measurement in reverse polarity mode will
also become inverted, the read results must be added. The sum of both level meter
results (normal- and reverse polarity) should therefore be 60 mA current difference.
Figure 46
Figure 46
The following calculation shows the elimination of the voltage and current offset caused
by output stage and current sensor. This differential measurement method eliminates the
offsets caused by the SLIC current sensor and the offset caused by the DC voltage
output (Ring offset voltage).
Preliminary Data Sheet
Loop resistance R
Ring offset RO2 = 60 V (CRAM coefficient set accordingly). Ring offset RO2 is
selected by setting bits RNG-OFFSET[1:0] in register LMCR3 to 10. The exact value
for the Ring offset voltage can be determined from the *.res result file generated by
DuSLICOS during the calculation of the appropriate coefficients.
Select Active High (ACTH) mode by setting the line mode command CIDD/CIOP bits
M2, M1, M0 to 010. In ACTH mode half of the ring offset voltage RO2 of e.g. 60 V will
be present and applied to Ring and Tip.
Select DC level meter by setting bits LM-SEL[3:0] in register LMCR2 to 0101.
Read level meter result registers LMRES1, LMRES2.
Switch into reverse polarity mode by setting bit REVPOL in register BCR1 to 1.
Read level meter result registers LMRES1, LMRES2.
shows the differential measurement method and the elimination of the offsets.
Differential Resistance Measurement
Reverse Polarity
loop
= 1000 ; R
Offsets
U
offset
I
TIP/RING
I
offset
loop
= R
expected values
112
LINE
dU
loop
Normal Polarity
+ 2*R
differentially:
PROT
dI
measured
+ 2*R
values
V
Operational Description
TIP/RING
duslic_0008_differentially
(R
STAB
LINE
+ R
DS3, 2003-07-11
PROT
DuSLIC
+ R
STAB
),

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