PEB 4364 T V1.2 Infineon Technologies, PEB 4364 T V1.2 Datasheet - Page 352

• Manufacturer Part Number: PEB 4364 T V1.2
• Description: IC SLIC VOICE ACCESS PDSO-36
• Manufacturer: Infineon Technologies
• Series: DuSLICr

Specifications of PEB 4364 T V1.2

• Function: Dual Channel Subscriber Line Interface Circuit (DuSLIC)
• Interface: IOM-2, PCM
• Number Of Circuits: 2
• Voltage - Supply: 3.3 V ~ 5 V
• Current - Supply: 105mA
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 36-PDSO
• Includes: DTMF Generator and Decoder, Line Echo Cancellation (LEC), Teletax (TTX) Generation, Universal Tone Detection (UTD)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Power (watts): -
• Other names: PEB4364TV1.2XT; SP000007728

7
Application circuits are shown for internal ringing with DuSLIC-E/-E2/-S/-P (balanced
and unbalanced) and for external unbalanced ringing with DuSLIC-E/-E2/-S/-S2/-P for
one line. Channel A and the SLIC must be duplicated in the circuit diagrams to show all
necessary components for two channels.
7.1
Internal balanced ringing is supported up to 85 Vrms for DuSLIC-E/-E2/-P and up to 45
Vrms for DuSLIC-S. Internal unbalanced ringing is supported for SLIC-P with ringing
amplitudes up to 50 Vrms without any additional components. All DuSLIC chip sets
incorporate internal off-hook- and ring trip detection.
Preliminary Data Sheet
Application Circuits
Internal Ringing (Balanced/Unbalanced)
352
Application Circuits
DS3, 2003-07-11
DuSLIC