PEB 4364 T V1.2 Infineon Technologies, PEB 4364 T V1.2 Datasheet - Page 154

• Manufacturer Part Number: PEB 4364 T V1.2
• Description: IC SLIC VOICE ACCESS PDSO-36
• Manufacturer: Infineon Technologies
• Series: DuSLICr

Specifications of PEB 4364 T V1.2

• Function: Dual Channel Subscriber Line Interface Circuit (DuSLIC)
• Interface: IOM-2, PCM
• Number Of Circuits: 2
• Voltage - Supply: 3.3 V ~ 5 V
• Current - Supply: 105mA
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 36-PDSO
• Includes: DTMF Generator and Decoder, Line Echo Cancellation (LEC), Teletax (TTX) Generation, Universal Tone Detection (UTD)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Power (watts): -
• Other names: PEB4364TV1.2XT; SP000007728

Bit
After a hardware reset, the RSTAT bit is set and generates an interrupt. Therefore the
default value of INTREG2 is 20
value changes to 4F
LM-THRES
READY
RSTAT
LM-OK
IO[4:1]-DU
Preliminary Data Sheet
08
H
INTREG2
THRES
LM-
7
Data on I/O pins 1 to 4 filtered by DUP-IO counter and interrupt generation
masked by the IO[4:1]-DU-M bits. A change of any of this bits generates
an interrupt.
Hardware reset status since last interrupt.
RSTAT = 0
RSTAT = 1
Level metering sequence has finished. An interrupt is only generated if
the LM-OK bit changes from 0 to 1.
LM-OK = 0
LM-OK = 1
Indication whether the level metering result is above or below the
threshold set by the CRAM coefficients
LM-THRES = 0 Level metering result is below threshold.
LM-THRES = 1 Level metering result is above threshold.
Indication whether the ramp generator has finished. An interrupt is only
generated if the READY bit changes from 0 to 1. Upon a new start of the
ramp generator, the bit is set to 0. For further information regarding soft
reversal see
READY = 0
READY = 1
READY RSTAT
H
.
6
Interrupt Register 2 (read-only)
Chapter
Ramp generator active.
Ramp generator not active.
No hardware reset has occurred since the last interrupt.
Hardware reset has occurred since the last interrupt.
Level metering result not ready.
Level metering result ready.
H
5
. After reading all four interrupt registers, the INTREG2
2.7.2.1.
LM-OK
4
154
3
2
IO[4:1]-DU
20
H
1
DS3, 2003-07-11
DuSLIC
0
Y