PEB 4364 T V1.2 Infineon Technologies, PEB 4364 T V1.2 Datasheet - Page 202

no-image

PEB 4364 T V1.2

Manufacturer Part Number
PEB 4364 T V1.2
Description
IC SLIC VOICE ACCESS PDSO-36
Manufacturer
Infineon Technologies
Series
DuSLICr
Datasheet

Specifications of PEB 4364 T V1.2

Function
Dual Channel Subscriber Line Interface Circuit (DuSLIC)
Interface
IOM-2, PCM
Number Of Circuits
2
Voltage - Supply
3.3 V ~ 5 V
Current - Supply
105mA
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
36-PDSO
Includes
DTMF Generator and Decoder, Line Echo Cancellation (LEC), Teletax (TTX) Generation, Universal Tone Detection (UTD)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Power (watts)
-
Other names
PEB4364TV1.2XT
SP000007728
Bit
Register setting is only active if bit TEST-EN in register LMCR1 is set to 1.
DC-POFI-HI
DC-HOLD
Preliminary Data Sheet
2D
H
TSTR5
7
0
Higher value for DC post filter limit
DC-POFI-HI = 0
DC-POFI-HI = 1
Actual DC output value hold (value of the last DSP filter stage will be
kept)
DC-HOLD = 0
DC-HOLD = 1
6
0
Test Register 5
5
0
Limit frequency is set to 100 Hz (normal operation).
Limit frequency is set to 300 Hz.
Normal operation.
DC output value hold.
POFI-
DC-
HI
4
202
HOLD
DC-
3
0
2
00
H
1
0
DS3, 2003-07-11
T
DuSLIC
0
0
Y

Related parts for PEB 4364 T V1.2