PEB 4364 T V1.2 Infineon Technologies, PEB 4364 T V1.2 Datasheet - Page 286

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PEB 4364 T V1.2

Manufacturer Part Number
PEB 4364 T V1.2
Description
IC SLIC VOICE ACCESS PDSO-36
Manufacturer
Infineon Technologies
Series
DuSLICr
Datasheet

Specifications of PEB 4364 T V1.2

Function
Dual Channel Subscriber Line Interface Circuit (DuSLIC)
Interface
IOM-2, PCM
Number Of Circuits
2
Voltage - Supply
3.3 V ~ 5 V
Current - Supply
105mA
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
36-PDSO
Includes
DTMF Generator and Decoder, Line Echo Cancellation (LEC), Teletax (TTX) Generation, Universal Tone Detection (UTD)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Power (watts)
-
Other names
PEB4364TV1.2XT
SP000007728
Bit
DUP[3:0]
DUP-IO[3:0]
Preliminary Data Sheet
14
H
IOCTL3
7
DUP[3:0] HOOK
0000
0001
...
1111
1) Minimum frequency for AC suppression.
Data Upstream Persistence Counter end value. Restricts the rate
of interrupts generated by the HOOK bit in the interrupt register
INTREG1. The interval is programmable from 1 to 16 ms in steps
of 1 ms (reset value is 10 ms).
The DUP[3:0] value affects the blocking period for ground key
detection (see
Data Upstream Persistence Counter end value for
The interval is programmable from 0.5 to 60.5 ms in steps of 4 ms
(reset value is 16.5 ms).
6
I/O Control Register 3
DUP[3:0]
the I/O pins when used as digital input pins.
the bits ICON and VTRLIM in register INTREG1.
Active,
Ringing
1
2
16
5
Chapter
4
286
2.6).
HOOK
Power
Down
2 ms
4 ms
32 ms
3
GNDK
4 ms
8 ms
64 ms
DUP-IO[3:0]
2
94
H
1
DS3, 2003-07-11
GNDK
f
125 Hz
62.5 Hz
7.8125 Hz
min,ACsup
DuSLIC
0
1)
Y

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