PEB 4364 T V1.2 Infineon Technologies, PEB 4364 T V1.2 Datasheet - Page 123
PEB 4364 T V1.2
Manufacturer Part Number
PEB 4364 T V1.2
Description
IC SLIC VOICE ACCESS PDSO-36
Manufacturer
Infineon Technologies
Series
DuSLICr
Datasheet
1.PEB_3264_F_V1.4.pdf
(374 pages)
Specifications of PEB 4364 T V1.2
Function
Dual Channel Subscriber Line Interface Circuit (DuSLIC)
Interface
IOM-2, PCM
Number Of Circuits
2
Voltage - Supply
3.3 V ~ 5 V
Current - Supply
105mA
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
36-PDSO
Includes
DTMF Generator and Decoder, Line Echo Cancellation (LEC), Teletax (TTX) Generation, Universal Tone Detection (UTD)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Power (watts)
-
Other names
PEB4364TV1.2XT
SP000007728
SP000007728
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Figure 52
The data rate of the interface can vary from 2*128 kbit/s to 2*8192 kbit/s (two highways).
A frame may consist of up to 128 time slots of 8 bits each. The time slot and PCM
highway assignment for each DuSLIC channel can be programmed. Receive and
transmit time slots can also be programmed individually.
Preliminary Data Sheet
FSC
DRA
TCA
PCLK
DXA
DETAIL A:
Time Slot
General PCM Interface Timing
0 1 2
FSC
DRA
PCLK
DXA
TCA
Detail A
3
High 'Z'
Clock
Bit
High 'Z'
7
0 1
6
5
2 3 4 5 6
123
Voice
Voice
Data
Data
4
3
2
125 µs
1
0
7
High 'Z'
High 'Z'
Time Slot
DS3, 2003-07-11
ezm14046
31
Interfaces
DuSLIC
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