PEB 4364 T V1.2 Infineon Technologies, PEB 4364 T V1.2 Datasheet - Page 129

• Manufacturer Part Number: PEB 4364 T V1.2
• Description: IC SLIC VOICE ACCESS PDSO-36
• Manufacturer: Infineon Technologies
• Series: DuSLICr

Specifications of PEB 4364 T V1.2

• Function: Dual Channel Subscriber Line Interface Circuit (DuSLIC)
• Interface: IOM-2, PCM
• Number Of Circuits: 2
• Voltage - Supply: 3.3 V ~ 5 V
• Current - Supply: 105mA
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 36-PDSO
• Includes: DTMF Generator and Decoder, Line Echo Cancellation (LEC), Teletax (TTX) Generation, Universal Tone Detection (UTD)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Power (watts): -
• Other names: PEB4364TV1.2XT; SP000007728

Programming the Microcontroller Interface Without Clocks at FSC, MCLK, PCLK
The SLICOFI-2x can also be programmed via the C Interface without any clocks
connected to the FSC, MCLK, and PCLK pins. This can be useful in Power Down modes
when additional power savings at the system level is necessary. In this case, a data clock
of up to 1.024 MHz can be used on pin DCLK.
Because the SLICOFI-2x exits the basic reset routine only if clocks at the FSC, MCLK,
and PCLK pins are applied, it is not possible to program the SLICOFI-2x without any
clocks at these pins directly after the hardware reset or power on reset.
Note: It is necessary to first exit the basic reset routine with the clocks applied in oder to
4.2
IOM-2 defines an industry-standard serial bus for interconnecting telecommunication
ICs for a broad range of applications – typically ISDN-based applications.
The IOM-2 bus provides a symmetrical full-duplex communication link containing data,
control/programming and status channels. Providing data, control, and status
information via a serial channel reduces the pin count and cost by simplifying the line
card layout.
The IOM-2 Interface consists of two data lines and two clock lines as follows:
DU:
DD:
FSC:
DCL:
SLICOFI-2x handles data as described in the IOM-2 specification for analog devices.
This specification is available on request from Infineon Technologies.
Preliminary Data Sheet
get the system running.
Data Upstream carries data from the SLICOFI-2x to a master device.
Data Downstream carries data from the master device to the SLICOFI-2x.
A Frame Synchronization Signal (8 kHz) supplied to SLICOFI-2x.
A Data Clock Signal (2048 kHz or 4096 kHz) supplied to SLICOFI-2x.
The IOM-2 Interface
129
DS3, 2003-07-11
Interfaces
DuSLIC