PEB 4364 T V1.2 Infineon Technologies, PEB 4364 T V1.2 Datasheet - Page 347

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PEB 4364 T V1.2

Manufacturer Part Number
PEB 4364 T V1.2
Description
IC SLIC VOICE ACCESS PDSO-36
Manufacturer
Infineon Technologies
Series
DuSLICr
Datasheet

Specifications of PEB 4364 T V1.2

Function
Dual Channel Subscriber Line Interface Circuit (DuSLIC)
Interface
IOM-2, PCM
Number Of Circuits
2
Voltage - Supply
3.3 V ~ 5 V
Current - Supply
105mA
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
36-PDSO
Includes
DTMF Generator and Decoder, Line Echo Cancellation (LEC), Teletax (TTX) Generation, Universal Tone Detection (UTD)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Power (watts)
-
Other names
PEB4364TV1.2XT
SP000007728
Parameter
Period PCLK
PCLK high time
Period FSC
FSC setup time
FSC hold time 1
FSC hold time 2
DRA/B setup time
DRA/B hold time
DXA/B delay time
DXA/B delay time to
high Z
TCA/B delay time on
TCA/B delay time off
1) The PCLK frequency must be an integer multiple of the FSC frequency.
2) All delay times are made up by two components: an intrinsic time (min-time), caused by internal processings,
Preliminary Data Sheet
and a second component caused by external circuitry (
1)
1)
2)
Symbol
t
t
t
t
t
t
t
t
t
t
t
t
PCLK
PCLKh
FSC
FSC_s
FSC_h1
FSC_h2
DR_s
DR_h
dDX
dDXhz
dTCon
dTCoff
min.
1/8192
0.4
10
40
40
10
10
25
25
25
25
t
PCLK
347
C
Load
typ.
1/(n*64) with
4 n 128
0.5
125
50
50
50
50
50
,
Limit Values
R
Pullup
t
PCLK
> 1.5 k )
Electrical Characteristics
max.
1/256
0.6
t
t
t
0.4[ns/pF]
C
50
t
0.4[ns/pF]
C
t
2
C
FSC
FSC_s
dDX_min
dTCon_min
dTCoff_min
Load
Load
Load
R
[pF]
[pF]
[pF])
Pullup
t
t
PCLK
PCLK
+
+
+
DS3, 2003-07-11
[k ]
DuSLIC
Unit
ms
ns
ns
ns
ns
ns
ns
ns
ns
ns
s
s

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