PEB 4364 T V1.2 Infineon Technologies, PEB 4364 T V1.2 Datasheet - Page 134

• Manufacturer Part Number: PEB 4364 T V1.2
• Description: IC SLIC VOICE ACCESS PDSO-36
• Manufacturer: Infineon Technologies
• Series: DuSLICr

Specifications of PEB 4364 T V1.2

• Function: Dual Channel Subscriber Line Interface Circuit (DuSLIC)
• Interface: IOM-2, PCM
• Number Of Circuits: 2
• Voltage - Supply: 3.3 V ~ 5 V
• Current - Supply: 105mA
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 36-PDSO
• Includes: DTMF Generator and Decoder, Line Echo Cancellation (LEC), Teletax (TTX) Generation, Universal Tone Detection (UTD)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Power (watts): -
• Other names: PEB4364TV1.2XT; SP000007728

Monitor Handshake Procedure
The monitor channel works in three states
Idle state:
Sending state:
Acknowledging:
A start of a transmission is initiated by a monitor transmitter in sending out an active MX
bit together with the first byte of data (the address of the receiver) to be transmitted in
the monitor channel.
The monitor channel remains in this state until the addressed monitor receiver
acknowledges the received data by sending out an active MR bit, which means that the
data transmission is repeated each 125 s frame (minimum is one repetition). At this
time, the monitor transmitter evaluates the MR bit.
Flow control can only take place when the transmitter’s MX and the receiver’s MR bit are
in active state.
Because the receiver is capable of receiving the monitor data at least twice (in two
consecutive frames), it is able to check for data errors. If two different bytes are received,
the receiver will wait for the receipt of two identical successive bytes (last look function).
A collision resolution mechanism (checks if another device is trying to send data at the
same time) is implemented in the transmitter. This is done by looking for the inactive (1)
phase of the MX bit and making a per-bit collision check on the transmitted monitor data
(check if there are transmitted 1s on DU/DD line; DU/DD line are open-drain lines).
Any abort leads to a reset of the SLICOFI-2x command stack, the device is ready to
receive new commands.
To maximize speed during data transfers, the transmitter anticipates the falling edge of
the receiver’s acknowledgment.
Due to the programming structure, duplex operation is not possible. Sending any data to
the SLICOFI-2x while transmission is active is not allowed.
Data transfer to the SLICOFI-2x starts with a SLICOFI-2x-specific address byte (81
Attention: Each byte on the monitor channel must be sent at least twice according
Preliminary Data Sheet
to the IOM-2 Monitor handshake procedure.
A pair of inactive (set to 1) MR and MX bits during two or more
consecutive frames: End of Message (EOM)
MX bit is activated (set to 0) by the monitor transmitter, together with
data bytes (can be changed) on the monitor channel
MR bit is set to active (set to 0) by the monitor receiver, together with
a data byte remaining in the monitor channel.
134
DS3, 2003-07-11
Interfaces
DuSLIC
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