PEB 4364 T V1.2 Infineon Technologies, PEB 4364 T V1.2 Datasheet - Page 253
PEB 4364 T V1.2
Manufacturer Part Number
PEB 4364 T V1.2
Description
IC SLIC VOICE ACCESS PDSO-36
Manufacturer
Infineon Technologies
Series
DuSLICr
Datasheet
1.PEB_3264_F_V1.4.pdf
(374 pages)
Specifications of PEB 4364 T V1.2
Function
Dual Channel Subscriber Line Interface Circuit (DuSLIC)
Interface
IOM-2, PCM
Number Of Circuits
2
Voltage - Supply
3.3 V ~ 5 V
Current - Supply
105mA
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
36-PDSO
Includes
DTMF Generator and Decoder, Line Echo Cancellation (LEC), Teletax (TTX) Generation, Universal Tone Detection (UTD)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Power (watts)
-
Other names
PEB4364TV1.2XT
SP000007728
SP000007728
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Bit
Bit
Universal Tone Detection Signal Level:
Calculation for Transmit:
Lev
Lev
Calculation for Receive:
Lev
Lev
AR1[dB]: The exact value for AR1 is shown in the DuSLICOS result file;
approximate value AR1
SLEV = 32768
–96 dB Lev
Signal Level:
SLEV-L = MOD (SLEV,256)
SLEV-H = INT (SLEV/256)
UTD for Receive and Transmit:
By enabling the UTD, the coefficients in the UTD registers are copied to the main
memory. Therefore, different coefficients can be set for receive and transmit direction.
Preliminary Data Sheet
50
51
H
H
S
S
S
S
[dB] = Lev
[dB] = Lev
[dB] = Lev
[dB] = Lev
UTD-SLEV-L Universal Tone Detection Signal Level
UTD-SLEV-H Universal Tone Detection Signal Level
7
7
S
S
S
S
S
0 dB
[dBm0] – 3.14 – 20*log
[dBm] – L
[dBm0] – 3.14 + AR1[dB] – 20*log
[dBm] – L
10
(Lev
6
6
S
Low Byte
High Byte
[dB])/20
x
R
[dBr] – 3.14 – 20*log
[dBr] – 3.14 + AR1[dB] – 20*log
L
R
– NLEV
for L
5
5
R
–2 dBr, AR1
10
( /2)
4
4
253
SLEV-H
SLEV-L
10
( /2)
10
3
3
( /2)
–2 dB for L
10
( /2)
2
2
R
–2 dBr.
1
1
DS3, 2003-07-11
DuSLIC
0
0
Y
Y
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