PEB 4364 T V1.2 Infineon Technologies, PEB 4364 T V1.2 Datasheet - Page 21

• Manufacturer Part Number: PEB 4364 T V1.2
• Description: IC SLIC VOICE ACCESS PDSO-36
• Manufacturer: Infineon Technologies
• Series: DuSLICr

Specifications of PEB 4364 T V1.2

• Function: Dual Channel Subscriber Line Interface Circuit (DuSLIC)
• Interface: IOM-2, PCM
• Number Of Circuits: 2
• Voltage - Supply: 3.3 V ~ 5 V
• Current - Supply: 105mA
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 36-PDSO
• Includes: DTMF Generator and Decoder, Line Echo Cancellation (LEC), Teletax (TTX) Generation, Universal Tone Detection (UTD)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Power (watts): -
• Other names: PEB4364TV1.2XT; SP000007728

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Usage of Codecs and SLICs
The DuSLIC-S and DuSLIC-S2 chip sets use the SLICOFI-2S (PEB 3264) codec
offering full basic POTS functionality, including programmable AC and DC
characteristics, integrated ringing and Integrated Test & Diagnostic Functions (ITDF)
etc.
The DuSLIC-E, DuSLIC-E2, and DuSLIC-P chip sets use the same SLICOFI-2
(PEB 3265) codec with full EDSP (Enhanced Digital Signal Processor) features such as
DTMF detection, Caller ID generation, Universal Tone Detection (UTD) and Line Echo
Cancellation (LEC).
These codecs (SLICOFI-2 and SLICOFI-2S) are manufactured using an advanced 0.35
µm 3.3 V CMOS process.
The main criteria for choosing the appropriate SLIC device, are the ringing voltage and
longitudinal balance.
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The SLIC-S2 and SLIC-E2 are optimized for longhaul applications, and offer a minimum
of 60 dB longitudinal balance.
All Infineon SLICs are manufactured in our well-proven 90 V and 170 V Smart Power
Technology (SPT) processes.
Dual-channel SLICs : TSLIC-S & TSLIC-E
The TSLIC-S (PEB 4364) and TSLIC-E (PEB 4365) chips are dual channel versions of
the SLIC-S (PEB 4264) and SLIC-E (PEB 4265) with identical technical specifications
for each channel. Therefore whenever SLIC-S or SLIC-E are mentioned in this and other
DuSLIC documentation, also TSLIC-S and TSLIC-E can be deployed.
DuSLIC Architecture
Unlike traditional designs, DuSLIC splits the SLIC function into high-voltage SLIC
functions and low-voltage SLIC functions.
The low-voltage functions are handled in the SLICOFI-2x device. The partitioning of the
functions is shown in
Preliminary Data Sheet
For both the DuSLIC-S and DuSLIC-E there are also long-haul versions, offering
increased longitudinal balance (60 dB) :
– DuSLIC-E2 (using SLIC-E2)
– DuSLIC-S2 (using SLIC-S2)
SLIC-S and SLIC-S2 offer balanced ringing (up to 45 Vrms)
SLIC-E and SLIC-E2 offer balanced ringing (up to 85 Vrms)
SLIC-P offers both balanced (85Vrms) and unbalanced ringing (50 Vrms)
Note: the above ring voltages are achievable with 20 Vdc offset. Smaller dc offset
will increase the maximum achievable ring voltage
Figure
1.
21
DS3, 2003-07-11
Overview
DuSLIC