PEB 4364 T V1.2 Infineon Technologies, PEB 4364 T V1.2 Datasheet - Page 66

no-image

PEB 4364 T V1.2

Manufacturer Part Number
PEB 4364 T V1.2
Description
IC SLIC VOICE ACCESS PDSO-36
Manufacturer
Infineon Technologies
Series
DuSLICr
Datasheet

Specifications of PEB 4364 T V1.2

Function
Dual Channel Subscriber Line Interface Circuit (DuSLIC)
Interface
IOM-2, PCM
Number Of Circuits
2
Voltage - Supply
3.3 V ~ 5 V
Current - Supply
105mA
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
36-PDSO
Includes
DTMF Generator and Decoder, Line Echo Cancellation (LEC), Teletax (TTX) Generation, Universal Tone Detection (UTD)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Power (watts)
-
Other names
PEB4364TV1.2XT
SP000007728
The UTDR-OK or UTDX-OK bit (register INTREG3 on
following conditions hold for a time span of at least RTime
RBRKTime:
1. The in-band signal exceeds a programmable level Lev
2. The difference of the in-band and the out-of-band signal levels exceeds Delta
The UTDR-OK or UTDX-OK bit will be reset if at least one of these conditions is violated
for a time span of at least ETime during which the violation continues for at least
EBRKTime. ETime and EBRKTime help reduce the effects of sporadic dropouts.
If the bandwidth parameter is programmed to a negative value, the UTD unit can be used
for the detection of silence intervals in the entire frequency range. The DuSLIC-E/-E2/-P
UTD unit is compatible with the ITU-T G.164 recommendation. The UTD is resistant to
a modulation with 15 Hz sinusoidal signals and a phase reversal, but is not able to detect
the 15 Hz modulation and the phase reversal.
2.8.6
Table 8
Table 8
Algorithm
Caller ID Sender (CIS)
Universal Tone Detection
(UTD)
DTMF Receiver
Line Echo Canceller (LEC)
Non Linear Processor
(NLP)
Operating System
1) SLICOFI-2 Version 1.5 only
Attention: The maximum capability of the EDSP is 32 MIPS. The user has to make
1) for RTime, RBRKTime, ETime and EBRKTime see
Preliminary Data Sheet
1)
shows the MIPS requirements for each algorithm using the EDSP:
MIPS Requirements for EDSP Capabilities
sure that the sum of all enabled algorithms does not exceed 32 MIPS in
any case!
MIPS Requirements
Used MIPS
1.736*n
1.208*n
(3.536 + 0.032*LEN)*n
2.448*n
6.296*n
1.432
CIS
UTD
DTMF
NLP
66
Chapter
5.2.3.3.
LEC
Page
S
1)
.
Conditions
n
n
receive for two channels
n
n
(for LEN see register
LEC-LEN on
n
155) will be set if both of the
without breaks longer than
CIS
UTD
DTMF
LEC
NLP
Functional Description
= 0...2
= 0...2
= 0...2
= 0...4, transmit and
= 0...2
DS3, 2003-07-11
Page
DuSLIC
229)
UTD
.

Related parts for PEB 4364 T V1.2