AT90CAN128-16AE ATMEL Corporation, AT90CAN128-16AE Datasheet - Page 153

• Manufacturer Part Number: AT90CAN128-16AE
• Description: 8-bit Avr Microcontroller With 128K Bytes of Isp Flash And CAN Controller.flash (Kbytes) 128 Vcc (V) 2.7-5.5 EEPROM (Kbytes) 4 SRAM (bytes) 4K CAN (mess. Obj.) 15
• Manufacturer: ATMEL Corporation

4250C–CAN–03/04
• Bit 6, 3 – WGM21:0: Waveform Generation Mode
These bits control the counting sequence of the counter, the source for the maximum
(TOP) counter value, and what type of waveform generation to be used. Modes of oper-
ation supported by the Timer/Counter unit are: Normal mode, Clear Timer on Compare
match (CTC) mode, and two types of Pulse Width Modulation (PWM) modes. See Table
66 and “Modes of Operation” on page 146.
Table 66. Waveform Generation Mode Bit Description
Note:
• Bit 5:4 – COM2A1:0: Compare Match Output Mode A
These bits control the Output Compare pin (OC2A) behavior. If one or both of the
COM2A1:0 bits are set, the OC2A output overrides the normal port functionality of the
I/O pin it is connected to. However, note that the Data Direction Register (DDR) bit cor-
responding to OC2A pin must be set in order to enable the output driver.
When OC2A is connected to the pin, the function of the COM2A1:0 bits depends on the
WGM21:0 bit setting. Table 67 shows the COM2A1:0 bit functionality when the
WGM21:0 bits are set to a normal or CTC mode (non-PWM).
Table 67. Compare Output Mode, non-PWM Mode
Table 68 shows the COM2A1:0 bit functionality when the WGM21:0 bits are set to fast
PWM mode.
Table 68. Compare Output Mode, Fast PWM Mode
Mode
COM2A1
COM2A1
0
1
2
3
0
0
1
1
0
0
1
1
1. The CTC2 and PWM2 bit definition names are now obsolete. Use the WGM21:0 def-
WGM21
(CTC2)
initions. However, the functionality and location of these bits are compatible with
previous versions of the timer.
0
0
1
1
COM2A0
COM2A0
0
1
0
1
WGM20
(PWM2)
0
1
0
1
0
1
0
1
Description
Normal port operation, OC2A disconnected.
Reserved
Clear OC2A on compare match.
Set OC2A at TOP.
Set OC2A on compare match.
Clear OC2A at TOP.
Description
Normal port operation, OC2A disconnected.
Toggle OC2A on compare match.
Clear OC2A on compare match.
Set OC2A on compare match.
Timer/Counter Mode
of Operation
Normal
PWM, Phase Correct
CTC
Fast PWM
(1)
TOP
0xFF
0xFF
OCR2A
0xFF
(1)
AT90CAN128
Update of
OCR2A at
Immediate
TOP
Immediate
TOP
TOV2 Flag
Set on
MAX
BOTTOM
MAX
MAX
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