AT90CAN128-16AE ATMEL Corporation, AT90CAN128-16AE Datasheet - Page 336

• Manufacturer Part Number: AT90CAN128-16AE
• Description: 8-bit Avr Microcontroller With 128K Bytes of Isp Flash And CAN Controller.flash (Kbytes) 128 Vcc (V) 2.7-5.5 EEPROM (Kbytes) 4 SRAM (bytes) 4K CAN (mess. Obj.) 15
• Manufacturer: ATMEL Corporation

Pin Mapping
Parameters
SPI Serial Programming
336
AT90CAN128
Table 132. Pin Mapping Serial Programming
The Flash parameters are given in Table 130 on page 328 and the EEPROM parame-
ters in Table 131 on page 328.
When writing serial data to the AT90CAN128, data is clocked on the rising edge of SCK.
When reading data from the AT90CAN128, data is clocked on the falling edge of SCK.
To program and verify the AT90CAN128 in the serial programming mode, the following
sequence is recommended (See four byte instruction formats in Table 134
1. Power-up sequence:
2. Wait for at least 20 ms and enable serial programming by sending the Programming
3. The serial programming instructions will not work if the communication is out of syn-
4. The Flash is programmed one page at a time. The memory page is loaded one byte
5. The EEPROM array is programmed one byte at a time by supplying the address
6. Any memory location can be verified by using the Read instruction which returns the
7. At the end of the programming session, RESET can be set high to commence nor-
8. Power-off sequence (if needed):
Apply power between V
systems, the programmer can not guarantee that SCK is held low during power-up.
In this case, RESET must be given a positive pulse of at least two CPU clock cycles
duration after SCK has been set to “0”.
Enable serial instruction to pin MOSI.
chronization. When in sync. the second byte (0x53), will echo back when issuing the
third byte of the Programming Enable instruction. Whether the echo is correct or
not, all four bytes of the instruction must be transmitted. If the 0x53 did not echo
back, give RESET a positive pulse and issue a new Programming Enable
command.
at a time by supplying the 7 LSB of the address and data together with the Load
Program Memory Page instruction. To ensure correct loading of the page, the data
low byte must be loaded before data high byte is applied for a given address. The
Program Memory Page is stored by loading the Write Program Memory Page
instruction with the 9 MSB of the address. If polling is not used, the user must wait at
least t
programming interface before the Flash write operation completes can result in
incorrect programming.
and data together with the appropriate Write instruction. An EEPROM memory loca-
tion is first automatically erased before new data is written. If polling is not used, the
user must wait at least t
a chip erased device, no 0xFFs in the data file(s) need to be programmed.
content at the selected address at serial output MISO.
mal operation.
Set RESET to “1”.
Turn V
MISO (PDO)
MOSI (PDI)
Symbol
SCK
WD_FLASH
CC
power off.
before issuing the next page. (See Table 133.) Accessing the serial
CC
WD_EEPROM
Pins
PE0
PE1
PB1
and GND while RESET and SCK are set to “0”. In some
before issuing the next byte. (See Table 133.) In
I/O
O
I
I
Serial Data out
Serial Data in
Description
Serial Clock
4250C–CAN–03/04
) :