AT90CAN128-16AE ATMEL Corporation, AT90CAN128-16AE Datasheet - Page 283

• Manufacturer Part Number: AT90CAN128-16AE
• Description: 8-bit Avr Microcontroller With 128K Bytes of Isp Flash And CAN Controller.flash (Kbytes) 128 Vcc (V) 2.7-5.5 EEPROM (Kbytes) 4 SRAM (bytes) 4K CAN (mess. Obj.) 15
• Manufacturer: ATMEL Corporation

Figure 138. Block Diagram
4250C–CAN–03/04
TDI
TDO
TCK
TMS
CONTROLLER
M
U
X
TAP
DEVICE BOUNDARY
INSTRUCTION
BREAKPOINT
SCAN CHAIN
REGISTER
REGISTER
REGISTER
BYPASS
ID
DECODER
ADDRESS
The IEEE std. 1149.1 also specifies an optional TAP signal; TRST – Test ReSeT –
which is not provided.
When the JTAGEN fuse is unprogrammed, these four TAP pins are normal port pins
and the TAP controller is in reset. When programmed and the JTD bit in MCUCR is
cleared, the TAP input signals are internally pulled high and the JTAG is enabled for
Boundary-scan and programming. In this case, the TAP output pin (TDO) is left floating
in states where the JTAG TAP controller is not shifting data, and must therefore be con
nected to a pull-up resistor or other hardware having pull-ups (for instance the TDI-input
of the next device in the scan chain). The device is shipped with this fuse programmed.
For the On-chip Debug system, in addition to the JTAG interface pins, the RESET pin is
monitored by the debugger to be able to detect external reset sources. The debugger
can also pull the RESET pin low to reset the whole system, assuming only open collec-
tors on the reset line are used in the application.
JTAG PROGRAMMING
MEMORY
FLASH
AND CONTROL
BREAKPOINT
OCD STATUS
INTERFACE
UNIT
Address
Data
FLOW CONTROL
I/O PORT n
I/O PORT 0
INTERNAL
CHAIN
SCAN
UNIT
BOUNDARY SCAN CHAIN
PC
Instruction
JTAG / AVR CORE
COMMUNICATION
PERIPHERAL
INTERFACE
AVR CPU
DIGITAL
UNITS
AT90CAN128
PERIPHERIAL
ANALOG
UNITS
283