AT90CAN128-16AE ATMEL Corporation, AT90CAN128-16AE Datasheet - Page 79

• Manufacturer Part Number: AT90CAN128-16AE
• Description: 8-bit Avr Microcontroller With 128K Bytes of Isp Flash And CAN Controller.flash (Kbytes) 128 Vcc (V) 2.7-5.5 EEPROM (Kbytes) 4 SRAM (bytes) 4K CAN (mess. Obj.) 15
• Manufacturer: ATMEL Corporation

Alternate Functions of Port E
4250C–CAN–03/04
Table 40. Overriding Signals for Alternate Functions in PD3..PD0
Note:
The Port E pins with alternate functions are shown in Table 41.
Table 41. Port E Pins Alternate Functions
The alternate pin configuration is as follows:
• PCINT7/ICP3 – Port E, Bit 7
INT7, External Interrupt source 7. The PE7 pin can serve as an external interrupt
source.
Signal Name
PUOE
PUOV
DDOE
DDOV
PVOE
PVOV
PTOE
DIEOE
DIEOV
DI
AIO
Port Pin
PE7
PE6
PE5
PE4
PE3
PE2
PE1
PE0
1. When enabled, the Two-wire Serial Interface enables Slew-Rate controls on the out-
put pins PD0 and PD1. This is not shown in this table. In addition, spike filters are
connected between the AIO outputs shown in the port figure and the digital logic of
the TWI module.
Alternate Function
INT7/ICP3 (External Interrupt 7 Input or Timer/Counter3 Input Capture Trigger)
INT6/ T3 (External Interrupt 6 Input or Timer/Counter3 Clock Input)
INT5/OC3C (External Interrupt 5 Input or Output Compare and PWM Output C for
Timer/Counter3)
INT4/OC3B (External Interrupt4 Input or Output Compare and PWM Output B for
Timer/Counter3)
AIN1/OC3A (Analog Comparator Negative Input or Output Compare and PWM
Output A for Timer/Counter3)
AIN0/XCK0 (Analog Comparator Positive Input or USART0 external clock
input/output)
PDO/TXD0 (Programming Data Output or UART0 Transmit Pin)
PDI/RXD0 (Programming Data Input or UART0 Receive Pin)
PD3/INT3/TXD1
TXEN1
0
TXEN1
1
TXEN1
TXD1
0
INT3 ENABLE
INT3 ENABLE
INT3 INPUT
–
PD2/INT2/RXD1
RXEN1
PORTD2 • PUD
RXEN1
0
0
0
0
INT2 INPUT/RXD1
–
INT2 ENABLE
INT2 ENABLE
PD1/INT1/SDA
TWEN
PORTD1 • PUD
0
0
TWEN
SDA_OUT
0
INT1 ENABLE
INT1 ENABLE
INT1 INPUT
SDA INPUT
AT90CAN128
(1)
PD0/INT0/SCL
TWEN
PORTD0 • PUD
0
0
TWEN
SCL_OUT
0
INT0 ENABLE
INT0 ENABLE
INT0 INPUT
SCL INPUT
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