AT90CAN128-16AE ATMEL Corporation, AT90CAN128-16AE Datasheet - Page 192

• Manufacturer Part Number: AT90CAN128-16AE
• Description: 8-bit Avr Microcontroller With 128K Bytes of Isp Flash And CAN Controller.flash (Kbytes) 128 Vcc (V) 2.7-5.5 EEPROM (Kbytes) 4 SRAM (bytes) 4K CAN (mess. Obj.) 15
• Manufacturer: ATMEL Corporation

USART1 Control and Status
Register C – UCSR1C
192
AT90CAN128
• Bit 7 – Reserved Bit
This bit is reserved for future use. For compatibility with future devices, these bit must be
written to zero when UCSRnC is written.
• Bit 6 – UMSELn: USARTn Mode Select
This bit selects between asynchronous and synchronous mode of operation.
Table 79. UMSELn Bit Settings
• Bit 5:4 – UPMn1:0: Parity Mode
These bits enable and set type of parity generation and check. If enabled, the Transmit-
ter will automatically generate and send the parity of the transmitted data bits within
each frame. The Receiver will generate a parity value for the incoming data and com-
pare it to the UPMn0 setting. If a mismatch is detected, the UPEn Flag in UCSRnA will
be set.
Table 80. UPMn Bits Settings
• Bit 3 – USBSn: Stop Bit Select
This bit selects the number of stop bits to be inserted by the Transmitter. The Receiver
ignores this setting.
Table 81. USBSn Bit Settings
Initial Value
Bit
Read/Write
Initial Value
UPMn1
UMSELn
0
0
1
1
0
1
USBSn
R
0
7
–
0
0
1
UMSEL1
R/W
0
6
0
UPMn0
Mode
Asynchronous Operation
Synchronous Operation
0
1
0
1
UPM11
R/W
0
5
0
Stop Bit(s)
1-bit
2-bit
UPM10
Parity Mode
Disabled
Reserved
Enabled, Even Parity
Enabled, Odd Parity
R/W
0
4
0
USBS1
R/W
0
3
0
UCSZ11
R/W
1
2
1
UCSZ10
R/W
1
1
1
UCPO1L
R/W
0
0
0
4250C–CAN–03/04
UCSR1C