AT90CAN128-16AE ATMEL Corporation, AT90CAN128-16AE Datasheet - Page 81
AT90CAN128-16AE
Manufacturer Part Number
AT90CAN128-16AE
Description
8-bit Avr Microcontroller With 128K Bytes of Isp Flash And CAN Controller.flash (Kbytes) 128 Vcc (V) 2.7-5.5 EEPROM (Kbytes) 4 SRAM (bytes) 4K CAN (mess. Obj.) 15
Manufacturer
ATMEL Corporation
Datasheet
1.AT90CAN128-16AE.pdf
(391 pages)
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Alternate Functions of Port F
4250C–CAN–03/04
RXD0, USART0 Receive Pin. Receive Data (Data input pin for the USART0). When the
USART0 receiver is enabled this pin is configured as an input regardless of the value of
DDRE0. When the USART0 forces this pin to be an input, a logical one in PORTE0 will
turn on the internal pull-up.
Table 42 and Table 43 relates the alternate functions of Port E to the overriding signals
shown in Figure 33 on page 68.
Table 42. Overriding Signals for Alternate Functions PE7..PE4
Table 43. Overriding Signals for Alternate Functions in PE3..PE0
Note:
The Port F has an alternate function as analog input for the ADC as shown in Table 44.
If some Port F pins are configured as outputs, it is essential that these do not switch
when a conversion is in progress. This might corrupt the result of the conversion. If the
Signal Name
PUOE
PUOV
DDOE
DDOV
PVOE
PVOV
PTOE
DIEOE
DIEOV
DI
AIO
Signal Name
PUOE
PUOV
DDOE
DDOV
PVOE
PVOV
PTOE
DIEOE
DIEOV
DI
AIO
1. AIN0D and AIN1D is described in “Digital Input Disable Register 1 – DIDR1” on page
262.
PE3/AIN1/OC3A
0
0
0
0
OC3A ENABLE
OC3A
0
AIN1D
0
0
AIN1 INPUT
PE7/INT7/ICP3
0
0
0
0
0
0
0
INT7 ENABLE
INT7 ENABLE
INT7 INPUT
/ICP3 INPUT
–
(1)
PE2/AIN0/XCK0
0
0
0
0
UMSEL0
XCK0 OUTPUT
0
AIN0D
0
XCK0 INPUT
AIN0 INPUT
PE6/INT6/T3
0
0
0
0
0
0
0
INT6 INPUT
/T3 INPUT
–
INT6 ENABLE
INT6 ENABLE
(1)
0
0
PE1/PDO/TXD0
TXEN0
0
TXEN0
1
TXEN0
TXD0
0
0
0
–
–
PE5/INT5/OC3C
0
0
OC3C ENABLE
OC3C
0
INT5 ENABLE
INT5 ENABLE
INT5 INPUT
–
AT90CAN128
PE4/INT4/OC3B
0
0
0
0
OC3B ENABLE
OC3B
0
INT4 ENABLE
INT4 ENABLE
INT4 INPUT
–
PE0/PDI/RXD0
RXEN0
PORTE0 • PUD
RXEN0
0
0
0
0
0
0
RXD0
–
81
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