AT90CAN128-16AE ATMEL Corporation, AT90CAN128-16AE Datasheet - Page 193

• Manufacturer Part Number: AT90CAN128-16AE
• Description: 8-bit Avr Microcontroller With 128K Bytes of Isp Flash And CAN Controller.flash (Kbytes) 128 Vcc (V) 2.7-5.5 EEPROM (Kbytes) 4 SRAM (bytes) 4K CAN (mess. Obj.) 15
• Manufacturer: ATMEL Corporation

USART0 Baud Rate Registers
– UBRR0L and UBRR0H
USART1 Baud Rate Registers
– UBRR1L and UBRR1H
4250C–CAN–03/04
• Bit 2:1 – UCSZn1:0: Character Size
The UCSZn1:0 bits combined with the UCSZn2 bit in UCSRnB sets the number of data
bits (Character SiZe) in a frame the Receiver and Transmitter use.
Table 82. UCSZn Bits Settings
• Bit 0 – UCPOLn: Clock Polarity
This bit is used for synchronous mode only. Write this bit to zero when asynchronous
mode is used. The UCPOLn bit sets the relationship between data output change and
data input sample, and the synchronous clock (XCKn).
Table 83. UCPOLn Bit Settings
Bit
Read/Write
Initial Value
Bit
Read/Write
Initial Value
UCPOLn
UCSZn2
0
1
0
0
0
0
1
1
1
1
Transmitted Data Changed
(Output of TxDn Pin)
Rising XCK Edge
Falling XCK Edge
R/W
R/W
15
15
R
R
–
7
0
0
–
7
0
0
R/W
R/W
UCSZn1
14
14
R
R
–
6
0
0
–
6
0
0
0
0
1
1
0
0
1
1
R/W
R/W
13
13
R
R
–
5
0
0
–
5
0
0
R/W
R/W
12
12
R
R
–
4
0
0
–
4
0
0
UBRR0[7:0]
UBRR1[7:0]
UCSZn0
0
1
0
1
0
1
0
1
R/W
R/W
R/W
R/W
11
11
3
0
0
3
0
0
Received Data Sampled
(Input on RxDn Pin)
Falling XCK Edge
Rising XCK Edge
R/W
R/W
R/W
R/W
5-bit
6-bit
7-bit
8-bit
Reserved
Reserved
Reserved
9-bit
Character Size
10
10
UBRR0[11:8]
UBRR1[11:8]
2
0
0
2
0
0
AT90CAN128
R/W
R/W
R/W
R/W
9
1
0
0
9
1
0
0
R/W
R/W
R/W
R/W
8
0
0
0
8
0
0
0
UBRR0H
UBRR0L
UBRR1H
UBRR1L
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