AT90CAN128-16AE ATMEL Corporation, AT90CAN128-16AE Datasheet - Page 169

• Manufacturer Part Number: AT90CAN128-16AE
• Description: 8-bit Avr Microcontroller With 128K Bytes of Isp Flash And CAN Controller.flash (Kbytes) 128 Vcc (V) 2.7-5.5 EEPROM (Kbytes) 4 SRAM (bytes) 4K CAN (mess. Obj.) 15
• Manufacturer: ATMEL Corporation

SPI Status Register – SPSR
SPI Data Register – SPDR
4250C–CAN–03/04
• Bit 7 – SPIF: SPI Interrupt Flag
When a serial transfer is complete, the SPIF flag is set. An interrupt is generated if SPIE
in SPCR is set and global interrupts are enabled. If SS is an input and is driven low
when the SPI is in Master mode, this will also set the SPIF flag. SPIF is cleared by hard-
ware when executing the corresponding interrupt handling vector. Alternatively, the
SPIF bit is cleared by first reading the SPI Status Register with SPIF set, then accessing
the SPI Data Register (SPDR).
• Bit 6 – WCOL: Write COLlision Flag
The WCOL bit is set if the SPI Data Register (SPDR) is written during a data transfer.
The WCOL bit (and the SPIF bit) are cleared by first reading the SPI Status Register
with WCOL set, and then accessing the SPI Data Register.
• Bit 5..1 – Res: Reserved Bits
These bits are reserved bits in the AT90CAN128 and will always read as zero.
• Bit 0 – SPI2X: Double SPI Speed Bit
When this bit is written logic one the SPI speed (SCK Frequency) will be doubled when
the SPI is in Master mode (see Table 74). This means that the minimum SCK period will
be two CPU clock periods. When the SPI is configured as Slave, the SPI is only guaran-
teed to work at f
The SPI interface on the AT90CAN128 is also used for program memory and EEPROM
downloading or uploading. See page 335 for serial programming and verification.
• Bits 7:0 - SPD7:0: SPI Data
The SPI Data Register is a read/write register used for data transfer between the Regis-
ter File and the SPI Shift Register. Writing to the register initiates data transmission.
Reading the register causes the Shift Register Receive buffer to be read.
Bit
Read/Write
Initial Value
Bit
Read/Write
Initial Value
SPD7
SPIF
R/W
R
X
7
0
7
clkio
/4 or lower.
WCOL
SPD6
R/W
R
X
6
0
6
SPD5
R/W
R
5
–
0
5
X
SPD4
R/W
R
X
4
–
0
4
SPD3
R/W
R
X
3
–
0
3
SPD2
R/W
R
2
–
0
2
X
AT90CAN128
SPD1
R/W
R
X
1
–
0
1
SPI2X
SPD0
R/W
R/W
X
0
0
0
Undefined
SPSR
SPDR
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